mirror of
https://git.freebsd.org/ports.git
synced 2025-06-07 05:40:30 -04:00
New features in GDB 8.3 include support for DWARF index caches and styling (colors) in the CLI and TUI. Source code styling is also available via the new SOURCE_HIGHLIGHT option (enabled by default). GDB 8.3 also adds support for FreeBSD/riscv64. In addition, kgdb has been updated for changes in 8.3 along with support for FreeBSD/riscv64 kernels. The libc++ helpers have been updated to a newer version which adds support for std::list<> and std::forward_list<>. The helpers now also support Python 3. Finally, a few post-8.3 patches have been backported which add suport for TLS (Thread Local Storage) variables on FreeBSD amd64, i386, powerpc, and riscv architectures. Note that amd64 and i386 do not support examining TLS variables in core dumps currently. This support along with support for additional architectures require kernel changes and will be added in the future once the kernel has been updated. Reviewed by: pizzamig (maintainer) Differential Revision: https://reviews.freebsd.org/D20403
237 lines
7.9 KiB
Text
237 lines
7.9 KiB
Text
commit dd6876c91cd40cc105b1a91f418ca2c80683b314
|
|
Author: John Baldwin <jhb@FreeBSD.org>
|
|
Date: Tue Mar 12 13:39:02 2019 -0700
|
|
|
|
Support fs_base and gs_base on FreeBSD/i386.
|
|
|
|
The i386 BSD native target uses the same ptrace operations
|
|
(PT_[GS]ET[FG]SBASE) as the amd64 BSD native target to fetch and store
|
|
the registers.
|
|
|
|
The amd64 BSD native now uses 'tdep->fsbase_regnum' instead of
|
|
hardcoding AMD64_FSBASE_REGNUM and AMD64_GSBASE_REGNUM to support
|
|
32-bit targets. In addition, the store operations explicitly zero the
|
|
new register value before fetching it from the register cache to
|
|
ensure 32-bit values are zero-extended.
|
|
|
|
gdb/ChangeLog:
|
|
|
|
* amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Use
|
|
tdep->fsbase_regnum instead of constants for fs_base and gs_base.
|
|
(amd64bsd_store_inferior_registers): Likewise.
|
|
* amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description):
|
|
Enable segment base registers.
|
|
* i386-bsd-nat.c (i386bsd_fetch_inferior_registers): Use
|
|
PT_GETFSBASE and PT_GETGSBASE.
|
|
(i386bsd_store_inferior_registers): Use PT_SETFSBASE and
|
|
PT_SETGSBASE.
|
|
* i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Enable
|
|
segment base registers.
|
|
* i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise.
|
|
|
|
diff --git gdb/amd64-bsd-nat.c gdb/amd64-bsd-nat.c
|
|
index a2a91abb91..35763a5b95 100644
|
|
--- gdb/amd64-bsd-nat.c
|
|
+++ gdb/amd64-bsd-nat.c
|
|
@@ -43,6 +43,9 @@ amd64bsd_fetch_inferior_registers (struct regcache *regcache, int regnum)
|
|
{
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
pid_t pid = get_ptrace_pid (regcache->ptid ());
|
|
+#if defined(PT_GETFSBASE) || defined(PT_GETGSBASE)
|
|
+ const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
+#endif
|
|
|
|
if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
|
|
{
|
|
@@ -57,27 +60,27 @@ amd64bsd_fetch_inferior_registers (struct regcache *regcache, int regnum)
|
|
}
|
|
|
|
#ifdef PT_GETFSBASE
|
|
- if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
|
|
+ if (regnum == -1 || regnum == tdep->fsbase_regnum)
|
|
{
|
|
register_t base;
|
|
|
|
if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
perror_with_name (_("Couldn't get segment register fs_base"));
|
|
|
|
- regcache->raw_supply (AMD64_FSBASE_REGNUM, &base);
|
|
+ regcache->raw_supply (tdep->fsbase_regnum, &base);
|
|
if (regnum != -1)
|
|
return;
|
|
}
|
|
#endif
|
|
#ifdef PT_GETGSBASE
|
|
- if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
|
|
+ if (regnum == -1 || regnum == tdep->fsbase_regnum + 1)
|
|
{
|
|
register_t base;
|
|
|
|
if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
perror_with_name (_("Couldn't get segment register gs_base"));
|
|
|
|
- regcache->raw_supply (AMD64_GSBASE_REGNUM, &base);
|
|
+ regcache->raw_supply (tdep->fsbase_regnum + 1, &base);
|
|
if (regnum != -1)
|
|
return;
|
|
}
|
|
@@ -116,6 +119,9 @@ amd64bsd_store_inferior_registers (struct regcache *regcache, int regnum)
|
|
{
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
pid_t pid = get_ptrace_pid (regcache->ptid ());
|
|
+#if defined(PT_SETFSBASE) || defined(PT_SETGSBASE)
|
|
+ const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
+#endif
|
|
|
|
if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
|
|
{
|
|
@@ -134,11 +140,13 @@ amd64bsd_store_inferior_registers (struct regcache *regcache, int regnum)
|
|
}
|
|
|
|
#ifdef PT_SETFSBASE
|
|
- if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
|
|
+ if (regnum == -1 || regnum == tdep->fsbase_regnum)
|
|
{
|
|
register_t base;
|
|
|
|
- regcache->raw_collect (AMD64_FSBASE_REGNUM, &base);
|
|
+ /* Clear the full base value to support 32-bit targets. */
|
|
+ base = 0;
|
|
+ regcache->raw_collect (tdep->fsbase_regnum, &base);
|
|
|
|
if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
perror_with_name (_("Couldn't write segment register fs_base"));
|
|
@@ -147,11 +155,13 @@ amd64bsd_store_inferior_registers (struct regcache *regcache, int regnum)
|
|
}
|
|
#endif
|
|
#ifdef PT_SETGSBASE
|
|
- if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
|
|
+ if (regnum == -1 || regnum == tdep->fsbase_regnum + 1)
|
|
{
|
|
register_t base;
|
|
|
|
- regcache->raw_collect (AMD64_GSBASE_REGNUM, &base);
|
|
+ /* Clear the full base value to support 32-bit targets. */
|
|
+ base = 0;
|
|
+ regcache->raw_collect (tdep->fsbase_regnum + 1, &base);
|
|
|
|
if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
perror_with_name (_("Couldn't write segment register gs_base"));
|
|
diff --git gdb/amd64-fbsd-nat.c gdb/amd64-fbsd-nat.c
|
|
index 9fff763dd3..cc676d3214 100644
|
|
--- gdb/amd64-fbsd-nat.c
|
|
+++ gdb/amd64-fbsd-nat.c
|
|
@@ -190,13 +190,13 @@ amd64_fbsd_nat_target::read_description ()
|
|
if (is64)
|
|
return amd64_target_description (xcr0, true);
|
|
else
|
|
- return i386_target_description (xcr0, false);
|
|
+ return i386_target_description (xcr0, true);
|
|
}
|
|
#endif
|
|
if (is64)
|
|
return amd64_target_description (X86_XSTATE_SSE_MASK, true);
|
|
else
|
|
- return i386_target_description (X86_XSTATE_SSE_MASK, false);
|
|
+ return i386_target_description (X86_XSTATE_SSE_MASK, true);
|
|
}
|
|
|
|
#if defined(HAVE_PT_GETDBREGS) && defined(USE_SIGTRAP_SIGINFO)
|
|
diff --git gdb/i386-bsd-nat.c gdb/i386-bsd-nat.c
|
|
index 009a8dc1b2..a10b496096 100644
|
|
--- gdb/i386-bsd-nat.c
|
|
+++ gdb/i386-bsd-nat.c
|
|
@@ -144,6 +144,33 @@ i386bsd_fetch_inferior_registers (struct regcache *regcache, int regnum)
|
|
return;
|
|
}
|
|
|
|
+#ifdef PT_GETFSBASE
|
|
+ if (regnum == -1 || regnum == I386_FSBASE_REGNUM)
|
|
+ {
|
|
+ register_t base;
|
|
+
|
|
+ if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
+ perror_with_name (_("Couldn't get segment register fs_base"));
|
|
+
|
|
+ regcache->raw_supply (I386_FSBASE_REGNUM, &base);
|
|
+ if (regnum != -1)
|
|
+ return;
|
|
+ }
|
|
+#endif
|
|
+#ifdef PT_GETGSBASE
|
|
+ if (regnum == -1 || regnum == I386_GSBASE_REGNUM)
|
|
+ {
|
|
+ register_t base;
|
|
+
|
|
+ if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
+ perror_with_name (_("Couldn't get segment register gs_base"));
|
|
+
|
|
+ regcache->raw_supply (I386_GSBASE_REGNUM, &base);
|
|
+ if (regnum != -1)
|
|
+ return;
|
|
+ }
|
|
+#endif
|
|
+
|
|
if (regnum == -1 || regnum >= I386_ST0_REGNUM)
|
|
{
|
|
struct fpreg fpregs;
|
|
@@ -211,6 +238,33 @@ i386bsd_store_inferior_registers (struct regcache *regcache, int regnum)
|
|
return;
|
|
}
|
|
|
|
+#ifdef PT_SETFSBASE
|
|
+ if (regnum == -1 || regnum == I386_FSBASE_REGNUM)
|
|
+ {
|
|
+ register_t base;
|
|
+
|
|
+ regcache->raw_collect (I386_FSBASE_REGNUM, &base);
|
|
+
|
|
+ if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
+ perror_with_name (_("Couldn't write segment register fs_base"));
|
|
+ if (regnum != -1)
|
|
+ return;
|
|
+ }
|
|
+#endif
|
|
+#ifdef PT_SETGSBASE
|
|
+ if (regnum == -1 || regnum == I386_GSBASE_REGNUM)
|
|
+ {
|
|
+ register_t base;
|
|
+
|
|
+ regcache->raw_collect (I386_GSBASE_REGNUM, &base);
|
|
+
|
|
+ if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
|
|
+ perror_with_name (_("Couldn't write segment register gs_base"));
|
|
+ if (regnum != -1)
|
|
+ return;
|
|
+ }
|
|
+#endif
|
|
+
|
|
if (regnum == -1 || regnum >= I386_ST0_REGNUM)
|
|
{
|
|
struct fpreg fpregs;
|
|
diff --git gdb/i386-fbsd-nat.c gdb/i386-fbsd-nat.c
|
|
index 7106e90801..be5d4c67be 100644
|
|
--- gdb/i386-fbsd-nat.c
|
|
+++ gdb/i386-fbsd-nat.c
|
|
@@ -160,7 +160,7 @@ i386_fbsd_nat_target::read_description ()
|
|
if (x86bsd_xsave_len == 0)
|
|
xcr0 = X86_XSTATE_SSE_MASK;
|
|
|
|
- return i386_target_description (xcr0, false);
|
|
+ return i386_target_description (xcr0, true);
|
|
}
|
|
#endif
|
|
|
|
diff --git gdb/i386-fbsd-tdep.c gdb/i386-fbsd-tdep.c
|
|
index 2f28bad728..ac57e7383d 100644
|
|
--- gdb/i386-fbsd-tdep.c
|
|
+++ gdb/i386-fbsd-tdep.c
|
|
@@ -267,7 +267,7 @@ i386fbsd_core_read_description (struct gdbarch *gdbarch,
|
|
struct target_ops *target,
|
|
bfd *abfd)
|
|
{
|
|
- return i386_target_description (i386fbsd_core_read_xcr0 (abfd), false);
|
|
+ return i386_target_description (i386fbsd_core_read_xcr0 (abfd), true);
|
|
}
|
|
|
|
/* Similar to i386_supply_fpregset, but use XSAVE extended state. */
|