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97 lines
3.4 KiB
Makefile
97 lines
3.4 KiB
Makefile
PORTNAME= yosys-systemverilog
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DISTVERSION= 2023-06-14
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CATEGORIES= cad
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PKGNAMEPREFIX=
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MAINTAINER= yuri@FreeBSD.org
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COMMENT= SystemVerilog support for Yosys
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WWW= https://github.com/antmicro/yosys-systemverilog
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LICENSE= APACHE20
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LICENSE_FILE= ${WRKSRC}/LICENSE
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BROKEN= incompatible yet with the latest cad/uhdm, see https://github.com/antmicro/yosys-systemverilog/issues/1845
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BUILD_DEPENDS= bash:shells/bash \
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yosys>0:cad/yosys
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LIB_DEPENDS= libcapnp.so:devel/capnproto \
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libffi.so:devel/libffi \
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libsurelog.so:cad/surelog \
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libuhdm.so:cad/uhdm
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RUN_DEPENDS= yosys>0:cad/yosys
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USES= cabal gmake pkgconfig python:build readline tcl
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USE_CABAL= alex-3.3.0.0 \
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cmdargs-0.10.22 \
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githash-0.1.6.3 \
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happy-1.20.1.1 \
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hashable-1.4.2.0_1 \
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primitive-0.8.0.0 \
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th-compat-0.1.4_2 \
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vector-0.13.0.0_3 \
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vector-stream-0.1.0.0_2
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SKIP_CABAL_PLIST= yes
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# in order to update USE_CABAL run 'make local-cabal-configure local-make-use-cabal'
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USE_GITHUB= yes
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GH_ACCOUNT= antmicro
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GH_TAGNAME= 49069fb-${DISTVERSION}
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GH_TUPLE= chipsalliance:yosys-f4pga-plugins:56f957c:yosys_f4pga_plugins/yosys-f4pga-plugins \
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zachjs:sv2v:6c4ee8f:sv2v/sv2v \
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YosysHQ:yosys:c5e4eec:yosys/yosys
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MAKE_ENV= DESTDIR=${DESTDIR} \
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HOME=${WRKSRC}
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MAKE_ARGS= YOSYS_PATH=${LOCALBASE} -j${MAKE_JOBS_NUMBER}
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BINARY_ALIAS= python3=${PYTHON_CMD} \
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install=${FILESDIR}/install.sh
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OPTIONS_DEFINE= TCMALLOC
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OPTIONS_DEFAULT= TCMALLOC # should be the same TCMALLOC default as in cad/yosys, cad/surelog, cad/uhdm because surelog's lib is used in the yosys plugin cad/yosys-systemverilog
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TCMALLOC_LDFLAGS= `pkg-config --libs libtcmalloc`
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TCMALLOC_LIB_DEPENDS= libtcmalloc.so:devel/google-perftools
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PORTSCOUT= ignore:1 # until https://github.com/antmicro/yosys-systemverilog/issues/1798 is resolved
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post-extract:
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@${CP} ${WRKSRC_yosys}/passes/pmgen/pmgen.py ${WRKSRC}/yosys-f4pga-plugins
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local-cabal-configure: check-cabal
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@cd ${WRKSRC}/sv2v && \
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${SETENV} ${MAKE_ENV} ${CABAL_HOME_ENV} ${CABAL_CMD} build --dry-run --disable-benchmarks --disable-tests --flags="${CABAL_FLAGS}" ${CABAL_WITH_ARGS} ${CABAL_LTO_ARGS} ${BUILD_ARGS} exe:sv2v
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local-make-use-cabal: check-cabal2tuple
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@${_CABAL2TUPLE_CMD} ${CABAL2TUPLE_ARGS} ${WRKSRC}/sv2v || (${ECHO_CMD} "Did you forget to make do-cabal-configure ?" ; exit 1)
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do-build:
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# UHDM plugin
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${ECHO} "==> Building the C part (yosys-f4pga-plugins)"
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@cd ${WRKSRC}/yosys-f4pga-plugins && ${SETENV} ${MAKE_ENV} ${GMAKE} ${MAKE_ARGS} ${ALL_TARGET}
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# sv2v
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${ECHO} "==> Building the Haskell part (sv2v)"
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cd ${WRKSRC}/sv2v && \
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${LN} -fs ${CABAL_DEPSDIR} && \
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${LN} -fs ../cabal.project.local && \
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${SETENV} ${MAKE_ENV} ${CABAL_HOME_ENV} ${CABAL_CMD} build --offline --disable-benchmarks --disable-tests ${CABAL_WITH_ARGS} ${CABAL_LTO_ARGS} --flags "${CABAL_FLAGS}" ${BUILD_ARGS} exe:sv2v
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do-install:
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# create directories
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@${MKDIR} \
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${STAGEDIR}${PREFIX}/share/yosys/plugins/fasm_extra_modules \
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${STAGEDIR}${PREFIX}/share/yosys/quicklogic/pp3 \
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${STAGEDIR}${PREFIX}/share/yosys/quicklogic/qlf_k6n10 \
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${STAGEDIR}${PREFIX}/share/yosys/quicklogic/qlf_k6n10f \
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${STAGEDIR}${PREFIX}/share/yosys/nexus
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# UHDM plugin
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cd ${WRKSRC}/yosys-f4pga-plugins && ${SETENV} ${MAKE_ENV} ${GMAKE} ${MAKE_ARGS} ${INSTALL_TARGET}
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# sv2v
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${INSTALL_PROGRAM} \
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${WRKSRC}/sv2v/dist-newstyle/build/*-freebsd/ghc-*/sv2v-*/x/sv2v/build/sv2v/sv2v \
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${STAGEDIR}${PREFIX}/bin
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# strip binaries
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${STRIP_CMD} ${STAGEDIR}${PREFIX}/share/yosys/plugins/*.so
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.include <bsd.port.mk>
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