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- fix build failures in i386 and amd64 due to compiler changes - fix numerous compilation warnings and logical errors that may trap in the future - convert all distribution files from DOS format to ease future changes - convert legacy patch file to new naming convention PR: 214990 Submitted by: bob@eager.cx (maintainer)
302 lines
14 KiB
C
302 lines
14 KiB
C
--- PDP1/pdp1_cpu.c.orig 2016-12-01 22:43:42 UTC
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+++ PDP1/pdp1_cpu.c
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@@ -546,7 +546,7 @@ reason = 0;
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while (reason == 0) { /* loop until halted */
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if (sim_interval <= 0) { /* check clock queue */
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- if (reason = sim_process_event ())
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+ if ((reason = sim_process_event ()))
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break;
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sbs_lvl = sbs_eval (); /* eval sbs system */
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}
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@@ -610,25 +610,25 @@ while (reason == 0) {
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/* Logical, load, store instructions */
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case 001: /* AND */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = AC & MB;
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break;
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case 002: /* IOR */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = AC | MB;
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break;
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case 003: /* XOR */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = AC ^ MB;
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break;
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@@ -638,9 +638,9 @@ while (reason == 0) {
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reason = STOP_XCT;
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break;
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}
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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xct_count = xct_count + 1; /* count XCT's */
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IR = MB; /* get instruction */
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@@ -648,9 +648,9 @@ while (reason == 0) {
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case 005: /* LCH */
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if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
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- if (reason = Ea_ch (IR, &byno)) /* MA <- eff addr */
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+ if ((reason = Ea_ch (IR, &byno))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = (MB << byt_shf[byno]) & 0770000; /* extract byte */
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}
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@@ -659,9 +659,9 @@ while (reason == 0) {
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case 006: /* DCH */
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if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
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- if (reason = Ea_ch (IR, &byno)) /* MA <- eff addr */
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+ if ((reason = Ea_ch (IR, &byno))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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MB = (MB & ~(0770000 >> byt_shf[byno])) | /* insert byte */
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((AC & 0770000) >> byt_shf[byno]);
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@@ -683,55 +683,55 @@ while (reason == 0) {
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break;
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case 010: /* LAC */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = MB;
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break;
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case 011: /* LIO */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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IO = MB;
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break;
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case 012: /* DAC */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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MB = AC;
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reason = Write ();
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break;
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case 013: /* DAP */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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MB = (AC & DAMASK) | (MB & ~DAMASK);
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reason = Write ();
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break;
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case 014: /* DIP */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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MB = (AC & ~DAMASK) | (MB & DAMASK);
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reason = Write ();
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break;
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case 015: /* DIO */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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MB = IO;
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reason = Write ();
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break;
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case 016: /* DZM */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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MB = 0;
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reason = Write ();
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@@ -755,9 +755,9 @@ while (reason == 0) {
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case 017: /* TAD */
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if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = AC + MB + ((PF & PF_L)? 1: 0); /* AC + opnd + L */
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if (AC > DMASK) /* carry? set L */
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@@ -769,9 +769,9 @@ while (reason == 0) {
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break;
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case 020: /* ADD */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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t = AC;
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AC = AC + MB;
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@@ -784,9 +784,9 @@ while (reason == 0) {
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break;
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case 021: /* SUB */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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t = AC ^ DMASK; /* complement AC */
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AC = t + MB; /* -AC + MB */
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@@ -798,9 +798,9 @@ while (reason == 0) {
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break;
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case 022: /* IDX */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = MB + 1;
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if (AC >= DMASK)
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@@ -810,9 +810,9 @@ while (reason == 0) {
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break;
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case 023: /* ISP */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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AC = MB + 1;
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if (AC >= DMASK)
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@@ -824,18 +824,18 @@ while (reason == 0) {
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break;
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case 024: /* SAD */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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if (AC != MB)
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PC = INCR_ADDR (PC);
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break;
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case 025: /* SAS */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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if (AC == MB)
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PC = INCR_ADDR (PC);
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@@ -863,7 +863,7 @@ while (reason == 0) {
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hst[hst_p].ea = PC;
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}
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else { /* normal JMP */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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PCQ_ENTRY;
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PC = MA;
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@@ -871,7 +871,7 @@ while (reason == 0) {
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break;
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case 031: /* JSP */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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AC = EPC_WORD;
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PCQ_ENTRY;
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@@ -889,9 +889,9 @@ while (reason == 0) {
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*/
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case 026: /* MUL */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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if (cpu_unit.flags & UNIT_MDV) { /* hardware? */
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sign = AC ^ MB; /* result sign */
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@@ -919,9 +919,9 @@ while (reason == 0) {
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break;
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case 027: /* DIV */
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- if (reason = Ea (IR)) /* MA <- eff addr */
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+ if ((reason = Ea (IR))) /* MA <- eff addr */
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break;
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- if (reason = Read ()) /* MB <- data */
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+ if ((reason = Read ())) /* MB <- data */
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break;
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if (cpu_unit.flags & UNIT_MDV) { /* hardware */
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sign = AC ^ MB; /* result sign */
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@@ -1362,13 +1362,13 @@ t_stat r;
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MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */
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if (IR & IA) { /* indirect addr? */
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if (extm) { /* extend? */
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- if (r = Read ()) /* read; err? */
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+ if ((r = Read ())) /* read; err? */
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return r;
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MA = MB & AMASK; /* one level */
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}
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else { /* multi-level */
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for (i = 0; i < ind_max; i++) { /* count indirects */
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- if (r = Read ()) /* get ind word */
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+ if ((r = Read ())) /* get ind word */
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return r;
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MA = (PC & EPCMASK) | (MB & DAMASK);
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if ((MB & IA) == 0)
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@@ -1392,12 +1392,12 @@ t_stat r;
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MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */
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if (extm) { /* extend? */
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- if (r = Read ()) /* read; err? */
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+ if ((r = Read ())) /* read; err? */
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return r;
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}
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else { /* multi-level */
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for (i = 0; i < ind_max; i++) { /* count indirects */
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- if (r = Read ()) /* get ind word */
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+ if ((r = Read ())) /* get ind word */
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return r;
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if ((MB & IA) == 0)
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break;
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