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c25da1631f
microcontrollers. It includes patches from the WinAVR project to support the ATmega32C1, ATmega32M1, ATmega32U4, and ATtiny167 controllers, and in particular the next generation AVRs ATxmega64A1 and ATxmega128A1. The port has been carefully crafted to peacefully coexist with the non-devel avr-gcc port. All executables installed have the suffix "-43" added for that reason.
183 lines
4.8 KiB
Text
183 lines
4.8 KiB
Text
Fix for GCC bugs:
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#19636
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#24894
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#31644
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#31786
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Index: avr.c
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===================================================================
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--- gcc/config/avr/avr.c (revision 132380)
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+++ gcc/config/avr/avr.c (working copy)
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@@ -976,6 +976,8 @@
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true_regnum (XEXP (x, 0)));
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debug_rtx (x);
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}
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+ if (!strict && GET_CODE (x) == SUBREG)
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+ x = SUBREG_REG (x);
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if (REG_P (x) && (strict ? REG_OK_FOR_BASE_STRICT_P (x)
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: REG_OK_FOR_BASE_NOSTRICT_P (x)))
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r = POINTER_REGS;
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@@ -990,6 +992,7 @@
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if (fit)
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{
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if (! strict
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+ || REGNO (XEXP (x,0)) == REG_X
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|| REGNO (XEXP (x,0)) == REG_Y
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|| REGNO (XEXP (x,0)) == REG_Z)
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r = BASE_POINTER_REGS;
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@@ -1957,7 +1960,7 @@
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/* This is a paranoid case. LEGITIMIZE_RELOAD_ADDRESS must exclude
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it but I have this situation with extremal
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optimization options. */
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-
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+
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*l = 4;
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if (reg_base == reg_dest)
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return (AS2 (adiw,r26,%o1) CR_TAB
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@@ -4840,43 +4843,9 @@
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order_regs_for_local_alloc (void)
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{
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unsigned int i;
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- static const int order_0[] = {
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- 24,25,
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- 18,19,
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- 20,21,
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- 22,23,
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- 30,31,
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- 26,27,
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- 28,29,
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- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,
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- 0,1,
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- 32,33,34,35
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- };
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- static const int order_1[] = {
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- 18,19,
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- 20,21,
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- 22,23,
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- 24,25,
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- 30,31,
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- 26,27,
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- 28,29,
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- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,
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- 0,1,
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- 32,33,34,35
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- };
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- static const int order_2[] = {
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- 25,24,
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- 23,22,
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- 21,20,
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- 19,18,
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- 30,31,
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- 26,27,
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- 28,29,
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- 17,16,
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- 15,14,13,12,11,10,9,8,7,6,5,4,3,2,
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- 1,0,
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- 32,33,34,35
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- };
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+ static const int order_0[] = REG_ALLOC_ORDER_0;
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+ static const int order_1[] = REG_ALLOC_ORDER_1;
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+ static const int order_2[] = REG_ALLOC_ORDER_2;
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const int *order = (TARGET_ORDER_1 ? order_1 :
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TARGET_ORDER_2 ? order_2 :
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@@ -5490,6 +5459,14 @@
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|| xx == arg_pointer_rtx)
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return 1; /* XXX frame & arg pointer checks */
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}
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+ else if (GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
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+ {
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+ int regno = REGNO (XEXP (x, 0));
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+ if (regno == REG_Z || regno == REG_Y || regno == REG_X)
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+ return 1;
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+ }
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+
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+
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return 0;
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}
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@@ -5692,7 +5669,7 @@
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return 1;
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/* Modes larger than QImode occupy consecutive registers. */
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- if (regno + GET_MODE_SIZE (mode) > FIRST_PSEUDO_REGISTER)
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+ if (regno <= (REG_Z + 1) && (regno + GET_MODE_SIZE (mode)) > (REG_Z + 2))
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return 0;
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/* All modes larger than QImode should start in an even register. */
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Index: avr.h
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===================================================================
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--- gcc/config/avr/avr.h (revision 132380)
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+++ gcc/config/avr/avr.h (working copy)
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@@ -199,19 +199,29 @@
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1,1,/* STACK */ \
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1,1 /* arg pointer */ }
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-#define REG_ALLOC_ORDER { \
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- 24,25, \
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- 18,19, \
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- 20,21, \
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- 22,23, \
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- 30,31, \
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- 26,27, \
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- 28,29, \
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- 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
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- 0,1, \
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- 32,33,34,35 \
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- }
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+#define REG_ALLOC_ORDER_0 {\
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+ 24,25,18,19,20,21,22,23,30,31,26,27,28,29, \
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+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
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+ 0,1,\
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+ 32,33,34,35 }
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+
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+#define REG_ALLOC_ORDER_1 {\
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+ 18,19,20,21,22,23,24,25,30,31,26,27,28,29,\
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+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
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+ 0,1,\
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+ 32,33,34,35 }
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+
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+#define REG_ALLOC_ORDER_2 {\
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+ 18,22,20,24,19,23,21,25,30,31,26,27,28,29, \
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+ 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,\
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+ 0,1,\
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+ 32,33,34,35 }
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+
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+
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+#define REG_ALLOC_ORDER REG_ALLOC_ORDER_0
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+
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+
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#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
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@@ -453,11 +463,14 @@
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OPNUM, TYPE); \
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goto WIN; \
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} \
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+ if(0) \
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+ { \
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push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
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BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
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OPNUM, TYPE); \
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goto WIN; \
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} \
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+ } \
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else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
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{ \
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push_reload (X, NULL_RTX, &X, NULL, \
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Index: avr.md
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===================================================================
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--- gcc/config/avr/avr.md (revision 132380)
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+++ gcc/config/avr/avr.md (working copy)
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@@ -251,8 +251,8 @@
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(set_attr "cc" "none")])
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(define_insn "*movhi"
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- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
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- (match_operand:HI 1 "general_operand" "r,m,rL,i,i,r,q"))]
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+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,Qm,d,*r,q,r")
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+ (match_operand:HI 1 "general_operand" "r,Qm,rL,i,i,r,q"))]
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"(register_operand (operands[0],HImode)
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|| register_operand (operands[1],HImode) || const0_rtx == operands[1])"
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"* return output_movhi (insn, operands, NULL);"
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