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e6d37282b2
base version: r170353: Fix another SROA crasher, PR14601. This was a silly oversight, we weren't pruning allocas which were used by variable-length memory intrinsics from the set that could be widened and promoted as integers. Fix that. r175057: X86: Disable generation of rep;movsl when %esi is used as a base pointer. This happens when there is both stack realignment and a dynamic alloca in the function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the base pointer and the next register spill will write into oblivion. Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas and freebsd a 4 byte stack alignment. r175360: MCParser: Reject .balign with non-pow2 alignments. GNU as rejects them and there are configure scripts in the wild that check if the assembler rejects ".align 3" to determine whether the alignment is in bytes or powers of two. r175962: X86: Disable cmov-memory patterns on subtargets without cmov. PR: ports/176269, ports/176893, ports/176967 Requested by: tijl, dim, others
49 lines
2 KiB
Text
49 lines
2 KiB
Text
$FreeBSD$
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------------------------------------------------------------------------
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r175962 | d0k | 2013-02-23 10:40:58 +0000 (Sat, 23 Feb 2013) | 3 lines
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X86: Disable cmov-memory patterns on subtargets without cmov.
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Fixes PR15115.
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------------------------------------------------------------------------
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Index: test/CodeGen/X86/no-cmov.ll
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===================================================================
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--- test/CodeGen/X86/no-cmov.ll (revision 0)
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+++ test/CodeGen/X86/no-cmov.ll (revision 175962)
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@@ -0,0 +1,11 @@
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+; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s
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+
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+define i32 @test1(i32 %g, i32* %j) {
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+ %tobool = icmp eq i32 %g, 0
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+ %cmp = load i32* %j, align 4
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+ %retval.0 = select i1 %tobool, i32 1, i32 %cmp
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+ ret i32 %retval.0
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+
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+; CHECK: test1:
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+; CHECK-NOT: cmov
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+}
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Index: lib/Target/X86/X86InstrCompiler.td
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===================================================================
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--- lib/Target/X86/X86InstrCompiler.td (revision 175961)
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+++ lib/Target/X86/X86InstrCompiler.td (revision 175962)
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@@ -1081,12 +1081,14 @@
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// inverted.
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multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32,
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Instruction Inst64> {
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- def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
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- (Inst16 GR16:$src2, addr:$src1)>;
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- def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
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- (Inst32 GR32:$src2, addr:$src1)>;
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- def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
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- (Inst64 GR64:$src2, addr:$src1)>;
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+ let Predicates = [HasCMov] in {
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+ def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
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+ (Inst16 GR16:$src2, addr:$src1)>;
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+ def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
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+ (Inst32 GR32:$src2, addr:$src1)>;
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+ def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
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+ (Inst64 GR64:$src2, addr:$src1)>;
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+ }
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}
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defm : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>;
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