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base version: r170353: Fix another SROA crasher, PR14601. This was a silly oversight, we weren't pruning allocas which were used by variable-length memory intrinsics from the set that could be widened and promoted as integers. Fix that. r175057: X86: Disable generation of rep;movsl when %esi is used as a base pointer. This happens when there is both stack realignment and a dynamic alloca in the function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the base pointer and the next register spill will write into oblivion. Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas and freebsd a 4 byte stack alignment. r175360: MCParser: Reject .balign with non-pow2 alignments. GNU as rejects them and there are configure scripts in the wild that check if the assembler rejects ".align 3" to determine whether the alignment is in bytes or powers of two. r175962: X86: Disable cmov-memory patterns on subtargets without cmov. PR: ports/176269, ports/176893, ports/176967 Requested by: tijl, dim, others
55 lines
2.2 KiB
Text
55 lines
2.2 KiB
Text
$FreeBSD$
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------------------------------------------------------------------------
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r175057 | d0k | 2013-02-13 13:40:35 +0000 (Wed, 13 Feb 2013) | 8 lines
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X86: Disable generation of rep;movsl when %esi is used as a base pointer.
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This happens when there is both stack realignment and a dynamic alloca in the
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function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the
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base pointer and the next register spill will write into oblivion.
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Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas
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and freebsd a 4 byte stack alignment.
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------------------------------------------------------------------------
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Index: lib/Target/X86/X86SelectionDAGInfo.cpp
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===================================================================
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--- lib/Target/X86/X86SelectionDAGInfo.cpp (revision 175056)
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+++ lib/Target/X86/X86SelectionDAGInfo.cpp (revision 175057)
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@@ -202,6 +202,14 @@
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SrcPtrInfo.getAddrSpace() >= 256)
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return SDValue();
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+ // ESI might be used as a base pointer, in that case we can't simply overwrite
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+ // the register. Fall back to generic code.
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+ const X86RegisterInfo *TRI =
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+ static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
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+ if (TRI->hasBasePointer(DAG.getMachineFunction()) &&
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+ TRI->getBaseRegister() == X86::ESI)
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+ return SDValue();
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+
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MVT AVT;
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if (Align & 1)
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AVT = MVT::i8;
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Index: test/CodeGen/X86/stack-align-memcpy.ll
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===================================================================
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--- test/CodeGen/X86/stack-align-memcpy.ll (revision 0)
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+++ test/CodeGen/X86/stack-align-memcpy.ll (revision 175057)
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@@ -0,0 +1,18 @@
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+; RUN: llc < %s -force-align-stack -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
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+
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+%struct.foo = type { [88 x i8] }
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+
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+; PR15249
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+; We can't use rep;movsl here because it clobbers the base pointer in %esi.
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+define void @test1(%struct.foo* nocapture %x, i32 %y) nounwind {
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+ %dynalloc = alloca i8, i32 %y, align 1
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+ call void @bar(i8* %dynalloc, %struct.foo* align 4 byval %x)
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+ ret void
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+
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+; CHECK: test1:
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+; CHECK: andl $-16, %esp
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+; CHECK: movl %esp, %esi
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+; CHECK-NOT: rep;movsl
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+}
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+
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+declare void @bar(i8* nocapture, %struct.foo* align 4 byval) nounwind
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