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7c084f620e
- fix build failures in i386 and amd64 due to compiler changes - fix numerous compilation warnings and logical errors that may trap in the future - convert all distribution files from DOS format to ease future changes - convert legacy patch file to new naming convention PR: 214990 Submitted by: bob@eager.cx (maintainer)
56 lines
2.8 KiB
C
56 lines
2.8 KiB
C
--- HP2100/hp2100_cpu3.c.orig 2016-12-01 22:43:42 UTC
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+++ HP2100/hp2100_cpu3.c
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@@ -186,7 +186,7 @@ entry = IR & 037;
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if (UNIT_CPU_MODEL != UNIT_1000_F) { /* 2100/M/E-Series? */
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if (op_ffp_e[entry] != OP_N)
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- if (reason = cpu_ops (op_ffp_e[entry], op, intrq)) /* get instruction operands */
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+ if ((reason = cpu_ops (op_ffp_e[entry], op, intrq))) /* get instruction operands */
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return reason;
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}
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@@ -194,7 +194,7 @@ if (UNIT_CPU_MODEL != UNIT_1000_F) {
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else { /* F-Series */
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if (op_ffp_f[entry] != OP_N)
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- if (reason = cpu_ops (op_ffp_f[entry], op, intrq)) /* get instruction operands */
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+ if ((reason = cpu_ops (op_ffp_f[entry], op, intrq))) /* get instruction operands */
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return reason;
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switch (entry) { /* decode IR<4:0> */
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@@ -417,7 +417,7 @@ switch (entry) {
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sa = op[0].word - 1;
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da = ReadW (sa); /* get jump target */
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- if (reason = resolve (da, &MA, intrq)) { /* resolve indirects */
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+ if ((reason = resolve (da, &MA, intrq))) { /* resolve indirects */
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PC = err_PC; /* irq restarts instruction */
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break;
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}
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@@ -435,7 +435,7 @@ switch (entry) {
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op[1].word = op[1].word + /* compute element offset */
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(op[2].word - 1) * op[3].word;
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else { /* 3-dim access */
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- if (reason = cpu_ops (OP_KK, op2, intrq)) { /* get 1st, 2nd ranges */
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+ if ((reason = cpu_ops (OP_KK, op2, intrq))) { /* get 1st, 2nd ranges */
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PC = err_PC; /* irq restarts instruction */
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break;
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}
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@@ -461,7 +461,7 @@ switch (entry) {
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for (j = 0; j < sc; j++) {
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MA = ReadW (sa++); /* get addr of actual */
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- if (reason = resolve (MA, &MA, intrq)) { /* resolve indirect */
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+ if ((reason = resolve (MA, &MA, intrq))) { /* resolve indirect */
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PC = err_PC; /* irq restarts instruction */
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break;
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}
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@@ -644,7 +644,7 @@ t_stat reason = SCPE_OK;
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entry = IR & 017; /* mask to entry point */
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if (op_dbi[entry] != OP_N)
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- if (reason = cpu_ops (op_dbi[entry], op, intrq)) /* get instruction operands */
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+ if ((reason = cpu_ops (op_dbi[entry], op, intrq))) /* get instruction operands */
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return reason;
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switch (entry) { /* decode IR<3:0> */
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