Merge in updates for mipsn32 and 32-bit arm.

- Brings in upstream commits to fix debugging on mipsn32 (properly parsing
  registers and signal information in core dumps as well as unwinding across
  signal frames)
- Brings in upstream commits for reworked ARM support.  Compared to the
  existing patch-armfbsd, this version includes generic FreeBSD target
  support (auxv, thread names from cores, $_siginfo, syscall names, etc.)
  as well as VFP support and an unwinder for signal frames.

Reviewed by:	pizzamig (maintainer)
MFH:		2017Q4
Differential Revision:	https://reviews.freebsd.org/D12630
This commit is contained in:
John Baldwin 2017-10-13 16:31:55 +00:00
parent 47f33ac6fd
commit b354928e16
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=452019
7 changed files with 753 additions and 237 deletions

View file

@ -3,6 +3,7 @@
PORTNAME= gdb
PORTVERSION= 8.0.1
PORTREVISION= 1
CATEGORIES= devel
MASTER_SITES= GNU
@ -52,7 +53,12 @@ EXTRA_PATCHES= ${FILESDIR}/commit-45eba0ab7d \
${FILESDIR}/commit-b30ff123fb \
${FILESDIR}/commit-48aeef91c2 \
${FILESDIR}/commit-0aa37b654c \
${FILESDIR}/commit-0335ac6d12
${FILESDIR}/commit-0335ac6d12 \
${FILESDIR}/commit-12c4bd7f53 \
${FILESDIR}/commit-6d5be5d6b8 \
${FILESDIR}/commit-a80a647180 \
${FILESDIR}/commit-544c67cda1 \
${FILESDIR}/commit-a181c0bf74
LIB_DEPENDS+= libexpat.so:textproc/expat2
VER= ${PORTVERSION:S/.//g}

View file

@ -0,0 +1,45 @@
commit 12c4bd7f53e9cefcf7c3a7f8cbf9e552526cb963
Author: John Baldwin <jhb@FreeBSD.org>
Date: Thu Oct 5 09:50:01 2017 -0700
Handle FreeBSD-specific AT_EHDRFLAGS and AT_HWCAP auxiliary vector types.
FreeBSD recently added two additional ELF auxiliary vectors. FreeBSD's
AT_HWCAP uses a different number compared to AT_HWCAP on Linux as the
numerical value was already in use for a different vector on FreeBSD.
include/ChangeLog:
* elf/common.h (AT_FREEBSD_EHDRFLAGS, AT_FREEBSD_HWCAP): Define.
gdb/ChangeLog:
* fbsd-tdep.c (fbsd_print_auxv_entry): Handle AT_EHDRFLAGS and
AT_HWCAP.
diff --git gdb/fbsd-tdep.c gdb/fbsd-tdep.c
index 727e28a645..fa4cd912ef 100644
--- gdb/fbsd-tdep.c
+++ gdb/fbsd-tdep.c
@@ -392,6 +392,8 @@ fbsd_print_auxv_entry (struct gdbarch *gdbarch, struct ui_file *file,
TAG (PAGESIZESLEN, _("Number of pagesizes"), AUXV_FORMAT_DEC);
TAG (TIMEKEEP, _("Pointer to timehands"), AUXV_FORMAT_HEX);
TAG (STACKPROT, _("Initial stack protection"), AUXV_FORMAT_HEX);
+ TAG (EHDRFLAGS, _("ELF header e_flags"), AUXV_FORMAT_HEX);
+ TAG (HWCAP, _("Machine-dependent CPU capability hints"), AUXV_FORMAT_HEX);
default:
default_print_auxv_entry (gdbarch, file, type, val);
return;
diff --git include/elf/common.h include/elf/common.h
index d08731cca1..f89ab32889 100644
--- include/elf/common.h
+++ include/elf/common.h
@@ -1144,6 +1144,8 @@
#define AT_FREEBSD_PAGESIZESLEN 21 /* Number of pagesizes. */
#define AT_FREEBSD_TIMEKEEP 22 /* Pointer to timehands. */
#define AT_FREEBSD_STACKPROT 23 /* Initial stack protection. */
+#define AT_FREEBSD_EHDRFLAGS 24 /* e_flags field from ELF header. */
+#define AT_FREEBSD_HWCAP 25 /* CPU feature flags. */
#define AT_SUN_UID 2000 /* Effective user ID. */
#define AT_SUN_RUID 2001 /* Real user ID. */

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@ -0,0 +1,159 @@
commit 544c67cda1686c1b204cb96c0d7885b08d37b8d6
Author: John Baldwin <jhb@FreeBSD.org>
Date: Fri Oct 6 11:41:45 2017 -0700
Account for padding in FreeBSD/mipsn32 NT_PRSTATUS notes.
Add a new ELF backend method to grok FreeBSD NT_PRSTATUS core dump
notes. Define a method for MIPS N32 to override the default
elfcore_grok_freebsd_prstatus that accounts for additional padding
between pr_pid and pr_reg that is not present in other 32-bit FreeBSD
platforms.
* elf-bfd.h (struct elf_backend_data): Add
`elf_backend_grok_freebsd_prstatus'.
* elf.c (elfcore_grok_freebsd_note): Call
`elf_backend_grok_freebsd_prstatus' to handle NT_PRSTATUS if
present.
* elfn32-mips.c (elf_n32_mips_grok_freebsd_prstatus): New
function.
(elf_backend_grok_freebsd_prstatus): Define.
* elfxx-target.h (elf_backend_grok_freebsd_prstatus): Define.
(elfNN_bed): Initialize `elf_backend_grok_freebsd_prstatus'.
diff --git bfd/elf-bfd.h bfd/elf-bfd.h
index fd08748ae2..399e298a8d 100644
--- bfd/elf-bfd.h
+++ bfd/elf-bfd.h
@@ -1270,6 +1270,11 @@ struct elf_backend_data
bfd_boolean (*elf_backend_grok_psinfo)
(bfd *, Elf_Internal_Note *);
+ /* This function, if defined, is called when a "FreeBSD" NT_PRSTATUS
+ note is found in a core file. */
+ bfd_boolean (*elf_backend_grok_freebsd_prstatus)
+ (bfd *, Elf_Internal_Note *);
+
/* This function, if defined, is called to write a note to a corefile. */
char *(*elf_backend_write_core_note)
(bfd *abfd, char *buf, int *bufsiz, int note_type, ...);
diff --git bfd/elf.c bfd/elf.c
index 02deceaf4c..c6de70d6b5 100644
--- bfd/elf.c
+++ bfd/elf.c
@@ -9981,9 +9981,14 @@ elfcore_grok_freebsd_prstatus (bfd *abfd, Elf_Internal_Note *note)
static bfd_boolean
elfcore_grok_freebsd_note (bfd *abfd, Elf_Internal_Note *note)
{
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+
switch (note->type)
{
case NT_PRSTATUS:
+ if (bed->elf_backend_grok_freebsd_prstatus)
+ if ((*bed->elf_backend_grok_freebsd_prstatus) (abfd, note))
+ return TRUE;
return elfcore_grok_freebsd_prstatus (abfd, note);
case NT_FPREGSET:
diff --git bfd/elfn32-mips.c bfd/elfn32-mips.c
index dce7ba1c7a..fdae18365e 100644
--- bfd/elfn32-mips.c
+++ bfd/elfn32-mips.c
@@ -80,6 +80,8 @@ static bfd_boolean elf32_mips_grok_prstatus
(bfd *, Elf_Internal_Note *);
static bfd_boolean elf32_mips_grok_psinfo
(bfd *, Elf_Internal_Note *);
+static bfd_boolean elf_n32_mips_grok_freebsd_prstatus
+ (bfd *, Elf_Internal_Note *);
static irix_compat_t elf_n32_mips_irix_compat
(bfd *);
@@ -3578,6 +3580,56 @@ elf32_mips_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
return TRUE;
}
+
+static bfd_boolean
+elf_n32_mips_grok_freebsd_prstatus (bfd *abfd, Elf_Internal_Note *note)
+{
+ size_t offset;
+ size_t size;
+ size_t min_size;
+
+ /* Compute offset of pr_getregsz, skipping over pr_statussz.
+ Also compute minimum size of this note. */
+ offset = 4 + 4;
+ min_size = offset + 4 * 2 + 4 + 4 + 4;
+
+ if (note->descsz < min_size)
+ return FALSE;
+
+ /* Check for version 1 in pr_version. */
+ if (bfd_h_get_32 (abfd, (bfd_byte *) note->descdata) != 1)
+ return FALSE;
+
+ /* Extract size of pr_reg from pr_gregsetsz. */
+ /* Skip over pr_gregsetsz and pr_fpregsetsz. */
+ size = bfd_h_get_32 (abfd, (bfd_byte *) note->descdata + offset);
+ offset += 4 * 2;
+
+ /* Skip over pr_osreldate. */
+ offset += 4;
+
+ /* Read signal from pr_cursig. */
+ if (elf_tdata (abfd)->core->signal == 0)
+ elf_tdata (abfd)->core->signal
+ = bfd_h_get_32 (abfd, (bfd_byte *) note->descdata + offset);
+ offset += 4;
+
+ /* Read TID from pr_pid. */
+ elf_tdata (abfd)->core->lwpid
+ = bfd_h_get_32 (abfd, (bfd_byte *) note->descdata + offset);
+ offset += 4;
+
+ /* Padding before pr_reg. */
+ offset += 4;
+
+ /* Make sure that there is enough data remaining in the note. */
+ if (note->descsz - offset < size)
+ return FALSE;
+
+ /* Make a ".reg/999" section and a ".reg" section. */
+ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
+ size, note->descpos + offset);
+}
/* Depending on the target vector we generate some version of Irix
executables or "normal" MIPS ELF ABI executables. */
@@ -3684,6 +3736,8 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
_bfd_mips_elf_copy_indirect_symbol
#define elf_backend_grok_prstatus elf32_mips_grok_prstatus
#define elf_backend_grok_psinfo elf32_mips_grok_psinfo
+#define elf_backend_grok_freebsd_prstatus \
+ elf_n32_mips_grok_freebsd_prstatus
#define elf_backend_ecoff_debug_swap &mips_elf32_ecoff_debug_swap
#define elf_backend_got_header_size (4 * MIPS_RESERVED_GOTNO)
diff --git bfd/elfxx-target.h bfd/elfxx-target.h
index 551883fa09..6efca84e4e 100644
--- bfd/elfxx-target.h
+++ bfd/elfxx-target.h
@@ -597,6 +597,9 @@
#ifndef elf_backend_grok_psinfo
#define elf_backend_grok_psinfo NULL
#endif
+#ifndef elf_backend_grok_freebsd_prstatus
+#define elf_backend_grok_freebsd_prstatus NULL
+#endif
#ifndef elf_backend_write_core_note
#define elf_backend_write_core_note NULL
#endif
@@ -820,6 +823,7 @@ static struct elf_backend_data elfNN_bed =
elf_backend_sort_relocs_p,
elf_backend_grok_prstatus,
elf_backend_grok_psinfo,
+ elf_backend_grok_freebsd_prstatus,
elf_backend_write_core_note,
elf_backend_lookup_section_flags_hook,
elf_backend_reloc_type_class,

View file

@ -0,0 +1,24 @@
commit 6d5be5d6b8b4412e65bc037472aa2e727c25ccf5
Author: John Baldwin <jhb@FreeBSD.org>
Date: Thu Oct 5 09:50:01 2017 -0700
Handle the NT_ARM_VFP core dump note on FreeBSD.
bfd/ChangeLog:
* elf.c (elfcore_grok_freebsd_note): Handle NT_ARM_VFP.
diff --git bfd/elf.c bfd/elf.c
index fd7f773730..02deceaf4c 100644
--- bfd/elf.c
+++ bfd/elf.c
@@ -10022,6 +10022,9 @@ elfcore_grok_freebsd_note (bfd *abfd, Elf_Internal_Note *note)
return elfcore_make_note_pseudosection (abfd, ".note.freebsdcore.lwpinfo",
note);
+ case NT_ARM_VFP:
+ return elfcore_grok_arm_vfp (abfd, note);
+
default:
return TRUE;
}

View file

@ -0,0 +1,79 @@
commit a181c0bf74
Author: John Baldwin <jhb@FreeBSD.org>
Date: Mon Oct 9 09:54:42 2017 -0700
Use gdbarch_long_bit to determine layout of FreeBSD siginfo_t.
FreeBSD architectures are either ILP32 or LP64 resulting in two
different layouts for siginfo_t. Previously, the 'bits_per_word'
member of bfd_arch_info was used to determine the layout to use for a
given FreeBSD architecture. However, mipsn32 architectures inherit
from a 64-bit mips architecture where bits_per_word is 64. As a
result, $_siginfo was not properly extracted from FreeBSD/mipsn32 core
dumps. Fix this by using gdbarch_long_bit instead of 'bits_per_word'
to determine if a FreeBSD architecture is ILP32 or LP64.
gdb/ChangeLog:
* fbsd-nat.c (fbsd_siginfo_size): Use gdbarch_long_bit.
(fbsd_convert_siginfo): Likewise.
* fbsd-tdep.c (fbsd_core_xfer_siginfo): Likewise.
diff --git gdb/ChangeLog gdb/ChangeLog
index 7c8c6e4fe5..b04da8bd44 100644
--- gdb/ChangeLog
+++ gdb/ChangeLog
@@ -1,3 +1,9 @@
+2017-10-09 John Baldwin <jhb@FreeBSD.org>
+
+ * fbsd-nat.c (fbsd_siginfo_size): Use gdbarch_long_bit.
+ (fbsd_convert_siginfo): Likewise.
+ * fbsd-tdep.c (fbsd_core_xfer_siginfo): Likewise.
+
2017-10-09 Simon Marchi <simon.marchi@polymtl.ca>
* configure.ac (try_guile_versions): Remove guile-2.2.
diff --git gdb/fbsd-nat.c gdb/fbsd-nat.c
index 5ad0dda5b4..265175a769 100644
--- gdb/fbsd-nat.c
+++ gdb/fbsd-nat.c
@@ -279,7 +279,7 @@ fbsd_siginfo_size ()
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
/* Is the inferior 32-bit? If so, use the 32-bit siginfo size. */
- if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
+ if (gdbarch_long_bit (gdbarch) == 32)
return sizeof (struct siginfo32);
#endif
return sizeof (siginfo_t);
@@ -296,7 +296,7 @@ fbsd_convert_siginfo (siginfo_t *si)
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
/* Is the inferior 32-bit? If not, nothing to do. */
- if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word != 32)
+ if (gdbarch_long_bit (gdbarch) != 32)
return;
struct siginfo32 si32;
diff --git gdb/fbsd-tdep.c gdb/fbsd-tdep.c
index fa4cd912ef..fa70f7c20b 100644
--- gdb/fbsd-tdep.c
+++ gdb/fbsd-tdep.c
@@ -143,7 +143,7 @@ fbsd_core_xfer_siginfo (struct gdbarch *gdbarch, gdb_byte *readbuf,
{
size_t siginfo_size;
- if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
+ if (gdbarch_long_bit (gdbarch) == 32)
siginfo_size = SIZE32_SIGINFO_T;
else
siginfo_size = SIZE64_SIGINFO_T;
@@ -168,7 +168,7 @@ fbsd_core_xfer_siginfo (struct gdbarch *gdbarch, gdb_byte *readbuf,
len = siginfo_size - offset;
ULONGEST siginfo_offset;
- if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
+ if (gdbarch_long_bit (gdbarch) == 32)
siginfo_offset = LWPINFO_OFFSET + LWPINFO32_PL_SIGINFO;
else
siginfo_offset = LWPINFO_OFFSET + LWPINFO64_PL_SIGINFO;

View file

@ -0,0 +1,53 @@
commit a80a647180bf92692e0f01efe7b323afe7d317c9
Author: John Baldwin <jhb@FreeBSD.org>
Date: Thu Oct 5 09:50:01 2017 -0700
Add a signal frame unwinder for FreeBSD/mipsn32.
The N32 signal frame uses an identical layout to N64, so reuse the N64
handler. The N32 signal trampoline does use one different instruction
relative to N64, so a separate tramp_frame is required.
gdb/ChangeLog:
* mips-fbsd-tdep.c (MIPS_INST_ADDIU_A0_SP_N32): Define.
(mipsn32_fbsd_sigframe): Define.
(mips_fbsd_init_abi): Install mipsn32_fbsd_sigframe unwinder
for FreeBSD/mipsn32.
diff --git gdb/mips-fbsd-tdep.c gdb/mips-fbsd-tdep.c
index 05545e37d8..b1578d0cbb 100644
--- gdb/mips-fbsd-tdep.c
+++ gdb/mips-fbsd-tdep.c
@@ -426,6 +426,23 @@ mips64_fbsd_sigframe_init (const struct tramp_frame *self,
trad_frame_set_id (cache, frame_id_build (sp, func));
}
+#define MIPS_INST_ADDIU_A0_SP_N32 (0x27a40000 \
+ + N64_SIGFRAME_UCONTEXT_OFFSET)
+
+static const struct tramp_frame mipsn32_fbsd_sigframe =
+{
+ SIGTRAMP_FRAME,
+ MIPS_INSN32_SIZE,
+ {
+ { MIPS_INST_ADDIU_A0_SP_N32, -1 }, /* addiu a0, sp, SIGF_UC */
+ { MIPS_INST_LI_V0_SIGRETURN, -1 }, /* li v0, SYS_sigreturn */
+ { MIPS_INST_SYSCALL, -1 }, /* syscall */
+ { MIPS_INST_BREAK, -1 }, /* break */
+ { TRAMP_SENTINEL_INSN, -1 }
+ },
+ mips64_fbsd_sigframe_init
+};
+
#define MIPS_INST_DADDIU_A0_SP_N64 (0x67a40000 \
+ N64_SIGFRAME_UCONTEXT_OFFSET)
@@ -519,6 +536,7 @@ mips_fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
tramp_frame_prepend_unwinder (gdbarch, &mips_fbsd_sigframe);
break;
case MIPS_ABI_N32:
+ tramp_frame_prepend_unwinder (gdbarch, &mipsn32_fbsd_sigframe);
break;
case MIPS_ABI_N64:
tramp_frame_prepend_unwinder (gdbarch, &mips64_fbsd_sigframe);

View file

@ -1,9 +1,12 @@
--- gdb/arm-fbsd-nat.c.orig 2017-09-14 09:28:17 UTC
diff --git gdb/arm-fbsd-nat.c gdb/arm-fbsd-nat.c
new file mode 100644
index 0000000000..b1c5c360f8
--- /dev/null
+++ gdb/arm-fbsd-nat.c
@@ -0,0 +1,215 @@
+/* Native-dependent code for BSD Unix running on ARM's, for GDB.
@@ -0,0 +1,151 @@
+/* Native-dependent code for FreeBSD/arm.
+
+ Copyright (C) 1988-2015 Free Software Foundation, Inc.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
@ -21,210 +24,146 @@
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "defs.h"
+#include "gdbcore.h"
+#include "inferior.h"
+#include "regcache.h"
+#include "target.h"
+#include "gregset.h"
+
+#include <sys/types.h>
+#include <sys/ptrace.h>
+#include <machine/reg.h>
+#include <machine/frame.h>
+
+#include "fbsd-nat.h"
+#include "arm-tdep.h"
+#include "arm-fbsd-tdep.h"
+#include "inf-ptrace.h"
+
+extern int arm_apcs_32;
+/* Determine if PT_GETREGS fetches REGNUM. */
+
+static pid_t
+ptrace_pid (ptid_t ptid)
+static bool
+getregs_supplies (struct gdbarch *gdbarch, int regnum)
+{
+ pid_t pid;
+ return ((regnum >= ARM_A1_REGNUM && regnum <= ARM_PC_REGNUM)
+ || regnum == ARM_PS_REGNUM);
+}
+
+#ifdef __FreeBSD__
+ pid = ptid_get_lwp (ptid);
+ if (pid == 0)
+#ifdef PT_GETVFPREGS
+/* Determine if PT_GETVFPREGS fetches REGNUM. */
+
+static bool
+getvfpregs_supplies (struct gdbarch *gdbarch, int regnum)
+{
+ return ((regnum >= ARM_D0_REGNUM && regnum <= ARM_D31_REGNUM)
+ || regnum == ARM_FPSCR_REGNUM);
+}
+#endif
+ pid = ptid_get_pid (ptid);
+ return pid;
+}
+
+static void
+arm_supply_gregset (struct regcache *regcache, const gregset_t *gregset, int regnum)
+{
+ int r;
+ CORE_ADDR r_pc;
+
+ /* Integer registers. */
+ for (r = ARM_A1_REGNUM; r < ARM_SP_REGNUM; r++)
+ if ((r == regnum) || (regnum == -1))
+ regcache_raw_supply (regcache, r, (char *) &gregset->r[r]);
+
+ if ((regnum == ARM_SP_REGNUM) || (regnum == -1))
+ regcache_raw_supply (regcache, ARM_SP_REGNUM,
+ (char *) &gregset->r_sp);
+ if ((regnum == ARM_LR_REGNUM) || (regnum == -1))
+ regcache_raw_supply (regcache, ARM_LR_REGNUM,
+ (char *) &gregset->r_lr);
+ /* This is ok: we're running native... */
+ if ((regnum == ARM_PC_REGNUM) || (regnum == -1))
+ {
+ r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc);
+ regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
+ }
+
+ if ((regnum == ARM_PS_REGNUM) || (regnum == -1))
+ {
+ if (arm_apcs_32)
+ regcache_raw_supply (regcache, ARM_PS_REGNUM,
+ (char *) &gregset->r_cpsr);
+ else
+ regcache_raw_supply (regcache, ARM_PS_REGNUM,
+ (char *) &gregset->r_pc);
+ }
+}
+
+static void
+armbsd_collect_gregset (const struct regcache *regcache, gregset_t *gregset, int regnum)
+{
+ int ret;
+ int r;
+
+ for (r = ARM_A1_REGNUM; r < ARM_SP_REGNUM; r++)
+ if ((regnum == r) || (regnum == -1))
+ regcache_raw_collect (regcache, r,
+ (char *) &gregset->r[r]);
+
+ if ((regnum == ARM_SP_REGNUM) || (regnum == -1))
+ regcache_raw_collect (regcache, ARM_SP_REGNUM,
+ (char *) &gregset->r_sp);
+ if ((regnum == ARM_LR_REGNUM) || (regnum == -1))
+ regcache_raw_collect (regcache, ARM_LR_REGNUM,
+ (char *) &gregset->r_lr);
+
+
+ if ((regnum == ARM_PC_REGNUM) || (regnum == -1))
+ regcache_raw_collect (regcache, ARM_PC_REGNUM,
+ (char *) &gregset->r_pc);
+ if ((regnum == ARM_PS_REGNUM) || (regnum == -1))
+ {
+ if (arm_apcs_32)
+ {
+ regcache_raw_collect (regcache, ARM_PS_REGNUM,
+ (char *) &gregset->r_cpsr);
+ }
+ else
+ {
+ unsigned psr_val;
+
+ regcache_raw_collect (regcache, ARM_PS_REGNUM,
+ (char *) &psr_val);
+
+ psr_val ^= gdbarch_addr_bits_remove (get_regcache_arch (regcache), psr_val);
+ gregset->r_pc = gdbarch_addr_bits_remove
+ (get_regcache_arch (regcache), gregset->r_pc);
+ gregset->r_pc |= psr_val;
+ }
+ }
+}
+
+/* Fill GDB's register array with the general-purpose register values
+ in *GREGSETP. */
+
+void
+supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
+{
+ arm_supply_gregset (regcache, gregsetp, -1);
+}
+
+/* Fill register REGNUM (if it is a general-purpose register) in
+ *GREGSETPS with the value in GDB's register array. If REGNUM is -1,
+ do this for all registers. */
+
+void
+fill_gregset (const struct regcache *regcache, gdb_gregset_t *gregsetp, int regnum)
+{
+ armbsd_collect_gregset (regcache, gregsetp, regnum);
+}
+
+/* Fill GDB's register array with the floating-point register values
+ in *FPREGSETP. */
+
+void
+supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
+{
+}
+
+/* Fill register REGNUM (if it is a floating-point register) in
+ *FPREGSETP with the value in GDB's register array. If REGNUM is -1,
+ do this for all registers. */
+
+void
+fill_fpregset (const struct regcache *regcache, gdb_fpregset_t *fpregsetp, int regnum)
+{
+}
+
+/* Fetch register REGNO from the child process. If REGNO is -1, do it
+/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
+ for all registers. */
+
+static void
+armfbsd_fetch_inferior_registers (struct target_ops *ops,
+ struct regcache *regcache, int regno)
+arm_fbsd_fetch_inferior_registers (struct target_ops *ops,
+ struct regcache *regcache, int regnum)
+{
+ gdb_gregset_t regs;
+ pid_t pid = get_ptrace_pid (regcache_get_ptid (regcache));
+
+ if (ptrace (PT_GETREGS, ptrace_pid (inferior_ptid),
+ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
+ {
+ struct reg regs;
+
+ if (ptrace (PT_GETREGS, pid, (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ perror_with_name (_("Couldn't get registers"));
+
+ arm_supply_gregset (regcache, &regs, regno);
+ /* TODO: fpregs */
+ regcache_supply_regset (&arm_fbsd_gregset, regcache, regnum, &regs,
+ sizeof (regs));
+ }
+
+#ifdef PT_GETVFPREGS
+ if (regnum == -1 || getvfpregs_supplies (gdbarch, regnum))
+ {
+ struct vfpreg vfpregs;
+
+ if (ptrace (PT_GETVFPREGS, pid, (PTRACE_TYPE_ARG3) &vfpregs, 0) == -1)
+ perror_with_name (_("Couldn't get floating point status"));
+
+ regcache_supply_regset (&arm_fbsd_vfpregset, regcache, regnum, &vfpregs,
+ sizeof (vfpregs));
+ }
+#endif
+}
+
+/* Store register REGNO back into the child process. If REGNO is -1,
+ do this for all registers. */
+/* Store register REGNUM back into the inferior. If REGNUM is -1, do
+ this for all registers. */
+
+static void
+armfbsd_store_inferior_registers (struct target_ops *ops,
+ struct regcache *regcache, int regno)
+arm_fbsd_store_inferior_registers (struct target_ops *ops,
+ struct regcache *regcache, int regnum)
+{
+ gdb_gregset_t regs;
+ pid_t pid = get_ptrace_pid (regcache_get_ptid (regcache));
+
+ if (ptrace (PT_GETREGS, ptrace_pid (inferior_ptid),
+ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
+ {
+ struct reg regs;
+
+ if (ptrace (PT_GETREGS, pid, (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ perror_with_name (_("Couldn't get registers"));
+
+ fill_gregset (regcache, &regs, regno);
+ regcache_collect_regset (&arm_fbsd_gregset, regcache, regnum, &regs,
+ sizeof (regs));
+
+ if (ptrace (PT_SETREGS, ptrace_pid (inferior_ptid),
+ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ if (ptrace (PT_SETREGS, pid, (PTRACE_TYPE_ARG3) &regs, 0) == -1)
+ perror_with_name (_("Couldn't write registers"));
+ /* TODO: FP regs */
+ }
+
+#ifdef PT_GETVFPREGS
+ if (regnum == -1 || getvfpregs_supplies (gdbarch, regnum))
+ {
+ struct vfpreg vfpregs;
+
+ if (ptrace (PT_GETVFPREGS, pid, (PTRACE_TYPE_ARG3) &vfpregs, 0) == -1)
+ perror_with_name (_("Couldn't get floating point status"));
+
+ regcache_collect_regset (&arm_fbsd_vfpregset, regcache, regnum, &vfpregs,
+ sizeof (vfpregs));
+
+ if (ptrace (PT_SETVFPREGS, pid, (PTRACE_TYPE_ARG3) &vfpregs, 0) == -1)
+ perror_with_name (_("Couldn't write floating point status"));
+ }
+#endif
+}
+
+void _initialize_armfbsd_nat (void);
+/* Implement the to_read_description method. */
+
+static const struct target_desc *
+arm_fbsd_read_description (struct target_ops *ops)
+{
+ const struct target_desc *desc;
+
+ desc = arm_fbsd_read_description_auxv (ops);
+ if (desc == NULL)
+ desc = ops->beneath->to_read_description (ops->beneath);
+ return desc;
+}
+
+void
+_initialize_armfbsd_nat (void)
+_initialize_arm_fbsd_nat (void)
+{
+ struct target_ops *t;
+
+ /* Add in local overrides. */
+ t = inf_ptrace_target ();
+ t->to_fetch_registers = armfbsd_fetch_inferior_registers;
+ t->to_store_registers = armfbsd_store_inferior_registers;
+ t->to_fetch_registers = arm_fbsd_fetch_inferior_registers;
+ t->to_store_registers = arm_fbsd_store_inferior_registers;
+ t->to_read_description = arm_fbsd_read_description;
+ fbsd_nat_add_target (t);
+}
diff --git gdb/arm-fbsd-tdep.c gdb/arm-fbsd-tdep.c
new file mode 100644
index 0000000000..c76bc96700
index 0000000000..02697b3de8
--- /dev/null
+++ gdb/arm-fbsd-tdep.c
@@ -0,0 +1,109 @@
+/* Target-dependent code for PowerPC systems running FreeBSD.
@@ -0,0 +1,260 @@
+/* Target-dependent code for FreeBSD/arm.
+
+ Copyright (C) 2013-2015 Free Software Foundation, Inc.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
@ -242,109 +181,319 @@ index 0000000000..c76bc96700
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "defs.h"
+#include "arch-utils.h"
+#include "frame.h"
+#include "gdbcore.h"
+#include "frame-unwind.h"
+#include "gdbtypes.h"
+
+#include "elf/common.h"
+#include "arm-tdep.h"
+#include "arm-fbsd-tdep.h"
+#include "auxv.h"
+#include "fbsd-tdep.h"
+#include "osabi.h"
+#include "regcache.h"
+#include "regset.h"
+#include "symtab.h"
+#include "solib-svr4.h"
+#include "target.h"
+#include "trad-frame.h"
+#include "tramp-frame.h"
+
+#include "arm-tdep.h"
+#include "solib-svr4.h"
+/* In a signal frame, sp points to a 'struct sigframe' which is
+ defined as:
+
+/* Description of the longjmp buffer. */
+#define ARM_FBSD_JB_PC 24
+#define ARM_FBSD_JB_ELEMENT_SIZE INT_REGISTER_SIZE
+ struct sigframe {
+ siginfo_t sf_si;
+ ucontext_t sf_uc;
+ mcontext_vfp_t sf_vfp;
+ };
+
+/* For compatibility with previous implemenations of GDB on arm/FreeBSD,
+ override the default little-endian breakpoint. */
+static const gdb_byte arm_fbsd_arm_le_breakpoint[] = {0x11, 0x00, 0x00, 0xe6};
+static const gdb_byte arm_fbsd_arm_be_breakpoint[] = {0xe6, 0x00, 0x00, 0x11};
+static const gdb_byte arm_fbsd_thumb_le_breakpoint[] = {0xfe, 0xde};
+static const gdb_byte arm_fbsd_thumb_be_breakpoint[] = {0xde, 0xfe};
+ ucontext_t is defined as:
+
+ struct __ucontext {
+ sigset_t uc_sigmask;
+ mcontext_t uc_mcontext;
+ ...
+ };
+
+ mcontext_t is defined as:
+
+ struct {
+ unsigned int __gregs[17];
+ size_t mc_vfp_size;
+ void *mc_vfp_ptr;
+ ...
+ };
+
+ mcontext_vfp_t is defined as:
+
+ struct {
+ uint64_t mcv_reg[32];
+ uint32_t mcv_fpscr;
+ };
+
+ If the VFP state is valid, then mc_vfp_ptr will point to sf_vfp in
+ the sigframe, otherwise it is NULL. There is no non-VFP floating
+ point register state saved in the signal frame. */
+
+#define ARM_MCONTEXT_REG_SIZE 4
+#define ARM_MCONTEXT_VFP_REG_SIZE 8
+#define ARM_SIGFRAME_UCONTEXT_OFFSET 64
+#define ARM_UCONTEXT_MCONTEXT_OFFSET 16
+#define ARM_MCONTEXT_VFP_PTR_OFFSET 72
+
+/* Implement the "init" method of struct tramp_frame. */
+
+static void
+arm_freebsd_init_abi_common (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
+arm_fbsd_sigframe_init (const struct tramp_frame *self,
+ struct frame_info *this_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
+ CORE_ADDR mcontext_addr =
+ sp
+ + ARM_SIGFRAME_UCONTEXT_OFFSET
+ + ARM_UCONTEXT_MCONTEXT_OFFSET;
+ CORE_ADDR mcontext_vfp_addr;
+ gdb_byte buf[4];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ {
+ trad_frame_set_reg_addr (this_cache,
+ ARM_A1_REGNUM + i,
+ mcontext_addr + i * ARM_MCONTEXT_REG_SIZE);
+ }
+ trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM,
+ mcontext_addr + 16 * ARM_MCONTEXT_REG_SIZE);
+
+ mcontext_vfp_addr = 0;
+ if (target_read_memory (mcontext_addr + ARM_MCONTEXT_VFP_PTR_OFFSET, buf,
+ 4) == 0)
+ mcontext_vfp_addr = extract_unsigned_integer (buf, 4, byte_order);
+ if (mcontext_vfp_addr != 0)
+ {
+ for (i = 0; i < 32; i++)
+ {
+ trad_frame_set_reg_addr (this_cache, ARM_D0_REGNUM + i,
+ mcontext_vfp_addr
+ + i * ARM_MCONTEXT_VFP_REG_SIZE);
+ }
+ trad_frame_set_reg_addr (this_cache, ARM_FPSCR_REGNUM,
+ mcontext_vfp_addr
+ + 32 * ARM_MCONTEXT_VFP_REG_SIZE);
+ }
+
+ trad_frame_set_id (this_cache, frame_id_build (sp, func));
+}
+
+static const struct tramp_frame arm_fbsd_sigframe =
+{
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ {0xe1a0000d, -1}, /* mov r0, sp */
+ {0xe2800040, -1}, /* add r0, r0, #SIGF_UC */
+ {0xe59f700c, -1}, /* ldr r7, [pc, #12] */
+ {0xef0001a1, -1}, /* swi SYS_sigreturn */
+ {TRAMP_SENTINEL_INSN, -1}
+ },
+ arm_fbsd_sigframe_init
+};
+
+/* Register maps. */
+
+static const struct regcache_map_entry arm_fbsd_gregmap[] =
+ {
+ { 13, ARM_A1_REGNUM, 4 }, /* r0 ... r12 */
+ { 1, ARM_SP_REGNUM, 4 },
+ { 1, ARM_LR_REGNUM, 4 },
+ { 1, ARM_PC_REGNUM, 4 },
+ { 1, ARM_PS_REGNUM, 4 },
+ { 0 }
+ };
+
+static const struct regcache_map_entry arm_fbsd_vfpregmap[] =
+ {
+ { 32, ARM_D0_REGNUM, 8 }, /* d0 ... d31 */
+ { 1, ARM_FPSCR_REGNUM, 4 },
+ { 0 }
+ };
+
+/* Register set definitions. */
+
+const struct regset arm_fbsd_gregset =
+ {
+ arm_fbsd_gregmap,
+ regcache_supply_regset, regcache_collect_regset
+ };
+
+const struct regset arm_fbsd_vfpregset =
+ {
+ arm_fbsd_vfpregmap,
+ regcache_supply_regset, regcache_collect_regset
+ };
+
+/* Implement the "regset_from_core_section" gdbarch method. */
+
+static void
+arm_fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
+ iterate_over_regset_sections_cb *cb,
+ void *cb_data,
+ const struct regcache *regcache)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ tdep->lowest_pc = 0x8000;
+ switch (info.byte_order)
+ cb (".reg", ARM_FBSD_SIZEOF_GREGSET, &arm_fbsd_gregset, NULL, cb_data);
+
+ /* While FreeBSD/arm cores do contain a NT_FPREGSET / ".reg2"
+ register set, it is not populated with register values by the
+ kernel but just contains all zeroes. */
+ if (tdep->vfp_register_count > 0)
+ cb (".reg-arm-vfp", ARM_FBSD_SIZEOF_VFPREGSET, &arm_fbsd_vfpregset,
+ "VFP floating-point", cb_data);
+}
+
+/* Lookup a target description from a target's AT_HWCAP auxiliary
+ vector. */
+
+const struct target_desc *
+arm_fbsd_read_description_auxv (struct target_ops *target)
+{
+ CORE_ADDR arm_hwcap = 0;
+
+ if (target_auxv_search (target, AT_FREEBSD_HWCAP, &arm_hwcap) != 1)
+ return NULL;
+
+ if (arm_hwcap & HWCAP_VFP)
+ {
+ case BFD_ENDIAN_LITTLE:
+ tdep->arm_breakpoint = arm_fbsd_arm_le_breakpoint;
+ tdep->thumb_breakpoint = arm_fbsd_thumb_le_breakpoint;
+ tdep->arm_breakpoint_size = sizeof (arm_fbsd_arm_le_breakpoint);
+ tdep->thumb_breakpoint_size = sizeof (arm_fbsd_thumb_le_breakpoint);
+ break;
+
+ case BFD_ENDIAN_BIG:
+ tdep->arm_breakpoint = arm_fbsd_arm_be_breakpoint;
+ tdep->thumb_breakpoint = arm_fbsd_thumb_be_breakpoint;
+ tdep->arm_breakpoint_size = sizeof (arm_fbsd_arm_be_breakpoint);
+ tdep->thumb_breakpoint_size = sizeof (arm_fbsd_thumb_be_breakpoint);
+ break;
+
+ default:
+ internal_error (__FILE__, __LINE__,
+ _("arm_gdbarch_init: bad byte order for float format"));
+ if (arm_hwcap & HWCAP_NEON)
+ return tdesc_arm_with_neon;
+ else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPD32))
+ == (HWCAP_VFPv3 | HWCAP_VFPD32))
+ return tdesc_arm_with_vfpv3;
+ else
+ return tdesc_arm_with_vfpv2;
+ }
+
+ tdep->jb_pc = ARM_FBSD_JB_PC;
+ tdep->jb_elt_size = ARM_FBSD_JB_ELEMENT_SIZE;
+ return NULL;
+}
+
+/* Implement the "core_read_description" gdbarch method. */
+
+static const struct target_desc *
+arm_fbsd_core_read_description (struct gdbarch *gdbarch,
+ struct target_ops *target,
+ bfd *abfd)
+{
+ return arm_fbsd_read_description_auxv (target);
+}
+
+/* Implement the 'init_osabi' method of struct gdb_osabi_handler. */
+
+static void
+arm_fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ /* Generic FreeBSD support. */
+ fbsd_init_abi (info, gdbarch);
+
+ if (tdep->fp_model == ARM_FLOAT_AUTO)
+ tdep->fp_model = ARM_FLOAT_SOFT_VFP;
+
+ tramp_frame_prepend_unwinder (gdbarch, &arm_fbsd_sigframe);
+
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+
+ tdep->jb_pc = 24;
+ tdep->jb_elt_size = 4;
+
+ set_gdbarch_iterate_over_regset_sections
+ (gdbarch, arm_fbsd_iterate_over_regset_sections);
+ set_gdbarch_core_read_description (gdbarch, arm_fbsd_core_read_description);
+
+ /* Single stepping. */
+ set_gdbarch_software_single_step (gdbarch, arm_software_single_step);
+}
+
+static void
+arm_freebsd_elf_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ arm_freebsd_init_abi_common (info, gdbarch);
+ if (tdep->fp_model == ARM_FLOAT_AUTO)
+ tdep->fp_model = ARM_FLOAT_SOFT_VFP;
+
+ /* NetBSD ELF uses SVR4-style shared libraries. */
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+}
+
+
+
+/* Provide a prototype to silence -Wmissing-prototypes. */
+
+void _initialize_armfbsd_tdep (void);
+
+void
+_initialize_armfbsd_tdep (void)
+_initialize_arm_fbsd_tdep (void)
+{
+
+ gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_FREEBSD,
+ arm_freebsd_elf_init_abi);
+ arm_fbsd_init_abi);
+}
diff --git gdb/config/arm/fbsd.mh gdb/config/arm/fbsd.mh
diff --git gdb/arm-fbsd-tdep.h gdb/arm-fbsd-tdep.h
new file mode 100644
index 0000000000..7b2fd44b91
index 0000000000..8717b804af
--- /dev/null
+++ gdb/arm-fbsd-tdep.h
@@ -0,0 +1,40 @@
+/* FreeBSD/arm target support, prototypes.
+
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "regset.h"
+
+/* The general-purpose regset consists of 13 R registers, plus SP, LR,
+ PC, and CPSR registers. */
+#define ARM_FBSD_SIZEOF_GREGSET (17 * 4)
+
+/* The VFP regset consists of 32 D registers plus FPSCR, and the whole
+ structure is padded to 64-bit alignment. */
+#define ARM_FBSD_SIZEOF_VFPREGSET (33 * 8)
+
+extern const struct regset arm_fbsd_gregset;
+extern const struct regset arm_fbsd_vfpregset;
+
+/* Flags passed in AT_HWCAP. */
+#define HWCAP_VFP 0x00000040
+#define HWCAP_NEON 0x00001000
+#define HWCAP_VFPv3 0x00002000
+#define HWCAP_VFPD32 0x00080000
+
+extern const struct target_desc *
+arm_fbsd_read_description_auxv (struct target_ops *target);
--- /dev/null
+++ gdb/config/arm/fbsd.mh
@@ -0,0 +1,3 @@
+# Host: FreeBSD/arm
+NATDEPFILES= arm-fbsd-nat.o fbsd-nat.o fork-child.o inf-ptrace.o
+HAVE_NATIVE_GCORE_HOST = 1
diff --git gdb/configure.tgt gdb/configure.tgt
index 122a72608f..06957c111d 100644
--- gdb/configure.tgt
+++ gdb/configure.tgt
@@ -110,6 +110,11 @@ arm*-*-linux*)
solib-svr4.o symfile-mem.o linux-tdep.o linux-record.o"
build_gdbserver=yes
;;
+arm*-*-freebsd*)
+ # Target: FreeBSD/arm
+ gdb_target_obs="arm.o arm-get-next-pcs.o arm-tdep.o arm-fbsd-tdep.o \
+ fbsd-tdep.o solib-svr4.o"
+ ;;
arm*-*-netbsd* | arm*-*-knetbsd*-gnu)
# Target: NetBSD/arm
gdb_target_obs="arm.o arm-get-next-pcs.o arm-tdep.o arm-nbsd-tdep.o \
diff --git gdb/Makefile.in gdb/Makefile.in
index 1d2dbaf3f7..6e96a88a98 100644
index 9454e3a62f..c9bd60a2d8 100644
--- gdb/Makefile.in
+++ gdb/Makefile.in
@@ -780,6 +780,7 @@ ALL_TARGET_OBS = \
@@ -794,6 +794,7 @@ ALL_TARGET_OBS = \
arc-tdep.o \
arm.o \
arm-bsd-tdep.o \
@ -352,10 +501,11 @@ index 1d2dbaf3f7..6e96a88a98 100644
arm-get-next-pcs.o \
arm-linux.o \
arm-linux-tdep.o \
@@ -2488,6 +2489,7 @@ ALLDEPFILES = \
@@ -2537,6 +2538,8 @@ ALLDEPFILES = \
arc-tdep.c \
arm.c \
arm-bsd-tdep.c \
+ arm-fbsd-nat.c \
+ arm-fbsd-tdep.c \
arm-get-next-pcs.c \
arm-linux.c \