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devel/llvm13: update to 13.0.1
Disable FLANG on armv6 and armv7. It's not 32-bit clean and many systems lack the RAM to build it natively. Disable LLDB on riscv64, there is no riscv64 support. [0] PR: 261374 [0] MFH: 2022Q1
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3 changed files with 9 additions and 17 deletions
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@ -1,6 +1,6 @@
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PORTNAME= llvm
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PORTNAME= llvm
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DISTVERSION= 13.0.0
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DISTVERSION= 13.0.1
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PORTREVISION= 3
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PORTREVISION= 0
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CATEGORIES= devel lang
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CATEGORIES= devel lang
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MASTER_SITES= https://github.com/llvm/llvm-project/releases/download/llvmorg-${DISTVERSION:S/rc/-rc/}/ \
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MASTER_SITES= https://github.com/llvm/llvm-project/releases/download/llvmorg-${DISTVERSION:S/rc/-rc/}/ \
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https://${PRE_}releases.llvm.org/${LLVM_RELEASE}/${RCDIR}
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https://${PRE_}releases.llvm.org/${LLVM_RELEASE}/${RCDIR}
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@ -99,9 +99,12 @@ OPTIONS_DEFAULT_powerpc64= ${OPTIONS_DEFAULT_powerpc64_${OSREL:R}} OPENMP
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OPTIONS_DEFAULT_powerpc64_13= GOLD
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OPTIONS_DEFAULT_powerpc64_13= GOLD
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OPTIONS_DEFAULT_powerpc64_14= GOLD
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OPTIONS_DEFAULT_powerpc64_14= GOLD
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OPTIONS_DEFAULT_powerpc64le= GOLD OPENMP
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OPTIONS_DEFAULT_powerpc64le= GOLD OPENMP
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OPTIONS_DEFAULT_riscv64= OPENMP
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OPTIONS_EXCLUDE_armv6= FLANG
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OPTIONS_EXCLUDE_armv7= FLANG
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OPTIONS_EXCLUDE_i386= FLANG
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OPTIONS_EXCLUDE_i386= FLANG
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OPTIONS_EXCLUDE_powerpc= FLANG
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OPTIONS_EXCLUDE_powerpc= FLANG
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OPTIONS_DEFAULT_riscv64= OPENMP
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OPTIONS_EXCLUDE_riscv64= LLDB
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OPTIONS_SINGLE= BACKENDS
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OPTIONS_SINGLE= BACKENDS
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OPTIONS_SINGLE_BACKENDS=BE_FREEBSD BE_NATIVE BE_STANDARD
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OPTIONS_SINGLE_BACKENDS=BE_FREEBSD BE_NATIVE BE_STANDARD
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OPTIONS_SUB= yes
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OPTIONS_SUB= yes
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@ -1,3 +1,3 @@
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TIMESTAMP = 1633622801
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TIMESTAMP = 1644266911
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SHA256 (llvm-project-13.0.0.src.tar.xz) = 6075ad30f1ac0e15f07c1bf062c1e1268c241d674f11bd32cdf0e040c71f2bf3
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SHA256 (llvm-project-13.0.1.src.tar.xz) = 326335a830f2e32d06d0a36393b5455d17dc73e0bd1211065227ee014f92cbf8
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SIZE (llvm-project-13.0.0.src.tar.xz) = 97577404
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SIZE (llvm-project-13.0.1.src.tar.xz) = 97584928
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@ -1,11 +0,0 @@
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--- llvm/lib/Target/X86/X86InstrSystem.td.orig
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+++ llvm/lib/Target/X86/X86InstrSystem.td
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@@ -585,7 +585,7 @@
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//===----------------------------------------------------------------------===//
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// VIA PadLock crypto instructions
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let Defs = [RAX, RDI], Uses = [RDX, RDI], SchedRW = [WriteSystem] in
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- def XSTORE : I<0xa7, MRM_C0, (outs), (ins), "xstore", []>, TB, REP;
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+ def XSTORE : I<0xa7, MRM_C0, (outs), (ins), "xstore", []>, TB;
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def : InstAlias<"xstorerng", (XSTORE)>;
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