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Add staging support.

Browse source 
Upgrade to a recent GCC version (4.8.3).

Drop most of our local hacks.

PR:		192399
Submitted by:	pi
This commit is contained in:
Joerg Wunsch 2014-08-08 20:46:59 +00:00
parent 9f5e02a4cc
commit 9b95e11603
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=364382
26 changed files with 43 additions and 7383 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

49
devel/avr-gcc/Makefile
View file

@ -1,24 +1,18 @@
# Created by: Joerg Wunsch <joerg@FreeBSD.org>
# $FreeBSD$
PORTNAME= gcc
PORTVERSION= 4.5.1
PORTREVISION= 2
PORTVERSION= 4.8.3
CATEGORIES= devel
MASTER_SITES= ${MASTER_SITE_GCC}
MASTER_SITES+= http://people.freebsd.org/~joerg/:local
MASTER_SITE_SUBDIR= releases/${DISTNAME}
MASTER_SITE_SUBDIR= releases/gcc-${DISTVERSION}
PKGNAMEPREFIX= avr-
DISTFILES= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
EXTRACT_ONLY= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
MAINTAINER= ports@FreeBSD.org
# DISTNAME= gcc-${DISTVERSION}
MAINTAINER= joerg@FreeBSD.org
COMMENT= FSF GCC 4.x for Atmel AVR 8-bit RISC cross-development
BROKEN= Fails to build with avr-binutils 2.24
LICENSE= GPLv3 GPLv3RLE
LICENSE_COMB= multi
BUILD_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils
@ -28,38 +22,37 @@ LIB_DEPENDS= libmpfr.so:${PORTSDIR}/math/mpfr \
RUN_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
avr-ld:${PORTSDIR}/devel/avr-binutils
# GCC 4.x doesn't want to be built in its own source directory.
WRKSRC= ${WRKDIR}/gcc-${PORTVERSION}
BUILD_WRKSRC= ${WRKDIR}/build
CONFIGURE_WRKSRC= ${BUILD_WRKSRC}
INSTALL_WRKSRC= ${BUILD_WRKSRC}
CONFIGURE_SCRIPT= ../gcc-${PORTVERSION}/configure
# DISTVERSION relates to downloads, GCC_VERSION and SUFFIX to names
# of executables and directories once installed. A PORTVERSION of
# 4.Y.2.s20130808 results in values of 4.Y-20130808, 4.Y.2, and 4Y
# for these three.
DISTVERSION= ${PORTVERSION:C/([0-9]+\.[0-9]+).*\.s([0-9]+)/\1-\2/}
GCC_VERSION= ${PORTVERSION:C/(.+)\.s[0-9]{8}/\1/}
SUFFIX= ${PORTVERSION:C/([0-9]+).([0-9]+).*/\1\2/}
USES= bison gettext gmake perl5 tar:bzip2 libtool
USE_PERL5= build
CPPFLAGS+= -I${LOCALBASE}/include
USES= bison gettext gmake perl5 tar:bzip2
GNU_CONFIGURE= yes
NO_STAGE= yes
.include <bsd.port.pre.mk>
.if (${ARCH} == "amd64")
ARCH= x86_64
.endif
CONFLICTS= avr-gcc-3* avr-gcc-42*
CONFLICTS= avr-gcc-devel*
CONFIGURE_ARGS= --target=avr --disable-libssp --with-gmp=${LOCALBASE}
MAKE_FLAGS= LANGUAGES="c c++"
CONFIGURE_ARGS= --target=avr --disable-libssp --with-gmp=${LOCALBASE} --enable-languages="c c++"
WITHOUT_CPU_CFLAGS=This is a cross-compiler.
MAN1= avr-cpp.1 avr-gcc.1 avr-g++.1 avr-gcov.1
MAN7= fsf-funding.7 gfdl.7 gpl.7
INFO= cpp gcc gccint cppinternals gccinstall
post-extract:
cd ${WRKDIR} && ${MKDIR} build
post-configure:
${MKDIR} ${WRKSRC}/gcc/include
post-stage:
${STRIP_CMD} ${STAGEDIR}${PREFIX}/libexec/gcc/avr/${PORTVERSION}/liblto_plugin.so.0
.include <bsd.port.post.mk>

6
devel/avr-gcc/distinfo
View file

@ -1,4 +1,2 @@
SHA256 (gcc-core-4.5.1.tar.bz2) = b57b37a83840b134572b042f170d7a9429863ba0308b56b403b35de6f0e0526a
SIZE (gcc-core-4.5.1.tar.bz2) = 27974462
SHA256 (gcc-g++-4.5.1.tar.bz2) = a5349ea8d531aa0a248484f426513e5d05b12915e5412d332c278f65d272ce48
SIZE (gcc-g++-4.5.1.tar.bz2) = 6473733
SHA256 (gcc-4.8.3.tar.bz2) = 6a8e4f11b185f4fe2ed9d7fc053e80f8c7e73f800c045f51f9d8bea33f080f1e
SIZE (gcc-4.8.3.tar.bz2) = 86126808

13
devel/avr-gcc/files/patch-200-gcc-4.5.1-libiberty-Makefile.in
View file

@ -1,13 +0,0 @@
diff -Naurp libiberty/Makefile.in libiberty/Makefile.in
--- libiberty/Makefile.in 2010-03-02 00:09:56.000000000 -0600
+++ libiberty/Makefile.in 2011-01-18 17:27:57.000000000 -0600
@@ -321,7 +321,8 @@ libiberty.html : $(srcdir)/libiberty.tex
@MAINT@ echo stamp > stamp-functions
INSTALL_DEST = @INSTALL_DEST@
-install: install_to_$(INSTALL_DEST) install-subdir
+#install: install_to_$(INSTALL_DEST) install-subdir
+install:
# This is tricky. Even though CC in the Makefile contains
# multilib-specific flags, it's overridden by FLAGS_TO_PASS from the

2755
devel/avr-gcc/files/patch-300-gcc-4.5.1-fixedpoint-3-4-2010
View file

File diff suppressed because it is too large Load diff

810
devel/avr-gcc/files/patch-301-gcc-4.5.1-xmega-v14
View file

@ -1,810 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 12:51:39.000000000 -0600
@@ -52,6 +52,7 @@
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
+static int nmi_function_p (tree);
static int avr_OS_task_function_p (tree);
static int avr_OS_main_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
@@ -122,6 +123,7 @@ static const struct attribute_spec avr_a
{ "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
{ "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
@@ -314,6 +316,21 @@ signal_function_p (tree func)
return a != NULL_TREE;
}
+/* Return nonzero if FUNC is a nmi function as specified
+ by the "nmi" attribute. */
+
+static int
+nmi_function_p (tree func)
+{
+ tree a;
+
+ if (TREE_CODE (func) != FUNCTION_DECL)
+ return 0;
+
+ a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func));
+ return a != NULL_TREE;
+}
+
/* Return nonzero if FUNC is a OS_task function. */
static int
@@ -543,6 +560,7 @@ expand_prologue (void)
cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
cfun->machine->is_signal = signal_function_p (current_function_decl);
+ cfun->machine->is_nmi = nmi_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
cfun->machine->stack_usage = 0;
@@ -583,18 +601,49 @@ expand_prologue (void)
/* Push SREG. */
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
cfun->machine->stack_usage++;
+ /* Push RAMPD, RAMPX, RAMPY. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Push RAMPD. */
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ /* Push RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ /* Push RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ insn = emit_move_insn (tmp_reg_rtx,
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
+
/* Push RAMPZ. */
if(AVR_HAVE_RAMPZ
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
insn = emit_move_insn (tmp_reg_rtx,
- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_move_insn (pushbyte, tmp_reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -607,6 +656,41 @@ expand_prologue (void)
/* Prevent any attempt to delete the setting of ZERO_REG! */
emit_use (zero_reg_rtx);
+
+
+ /*
+ Clear RAMP? registers if used for data access in the interrupt/signal
+ context. Do this after the zero register has been explictly cleared.
+ */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Set RAMPD to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ /* Set RAMPX to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ /* Set RAMPY to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ if(AVR_HAVE_RAMPZ
+ && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
+ {
+ /* Set RAMPZ to 0. */
+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)), const0_rtx);
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+ }
+
}
if (minimize && (frame_pointer_needed
|| (AVR_2_BYTE_PC && live_seq > 6)
@@ -698,16 +782,16 @@ expand_prologue (void)
insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
}
- else if (TARGET_NO_INTERRUPTS
- || cfun->machine->is_signal
- || cfun->machine->is_OS_main)
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
+ || (!AVR_XMEGA && cfun->machine->is_signal)
+ || (!AVR_XMEGA && cfun->machine->is_OS_main))
{
insn =
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
RTX_FRAME_RELATED_P (insn) = 1;
}
- else if (cfun->machine->is_interrupt)
+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
{
insn = emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
frame_pointer_rtx));
@@ -878,13 +962,13 @@ expand_epilogue (void)
{
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
- else if (TARGET_NO_INTERRUPTS
- || cfun->machine->is_signal)
+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
+ || (!AVR_XMEGA && cfun->machine->is_signal))
{
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
}
- else if (cfun->machine->is_interrupt)
+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
{
emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
frame_pointer_rtx));
@@ -937,14 +1021,39 @@ expand_epilogue (void)
&& (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
{
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(RAMPZ_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_RAMPZ_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
+ if (AVR_HAVE_RAMPX_Y_D)
+ {
+ /* Pop RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
+ tmp_reg_rtx);
+ }
+
+ /* Pop RAMPD. */
+ emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
tmp_reg_rtx);
}
/* Restore SREG using tmp reg as scratch. */
emit_insn (gen_popqi (tmp_reg_rtx));
- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(SREG_ADDR)),
+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_SREG_ADDR)),
tmp_reg_rtx);
/* Restore tmp REG. */
@@ -1722,9 +1831,17 @@ output_movhi (rtx insn, rtx operands[],
return *l = 1, AS2 (out,__SP_L__,%A1);
/* Use simple load of stack pointer if no interrupts are
used. */
- else if (TARGET_NO_INTERRUPTS)
+ else if (!AVR_XMEGA && TARGET_NO_INTERRUPTS)
return *l = 2, (AS2 (out,__SP_H__,%B1) CR_TAB
AS2 (out,__SP_L__,%A1));
+ if(AVR_XMEGA)
+ {
+ *l = 2;
+ return (AS2 (out,__SP_L__,%A1) CR_TAB
+ AS2 (out,__SP_H__,%B1));
+ }
+ else
+ {
*l = 5;
return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
"cli" CR_TAB
@@ -1732,6 +1849,7 @@ output_movhi (rtx insn, rtx operands[],
AS2 (out,__SREG__,__tmp_reg__) CR_TAB
AS2 (out,__SP_L__,%A1));
}
+ }
else if (test_hard_reg_class (STACK_REG, src))
{
*l = 2;
@@ -1865,7 +1983,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (in,%0,__SREG__);
@@ -1873,7 +1991,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
- return AS2 (in,%0,%m1-0x20);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (in,%0,%m1-%2);
}
*l = 2;
return AS2 (lds,%0,%m1);
@@ -2061,8 +2180,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
- return (AS2 (in,%A0,%m1-0x20) CR_TAB
- AS2 (in,%B0,%m1+1-0x20));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return (AS2 (in,%A0,%m1-%2) CR_TAB
+ AS2 (in,%B0,%m1+1-%2));
}
*l = 4;
return (AS2 (lds,%A0,%m1) CR_TAB
@@ -2561,7 +2681,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
- if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR)
+ if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR)
{
*l = 1;
return AS2 (out,__SREG__,%1);
@@ -2569,7 +2689,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
- return AS2 (out,%m0-0x20,%1);
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (out,%m0-%2,%1);
}
*l = 2;
return AS2 (sts,%m0,%1);
@@ -2648,9 +2769,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
- return (AS2 (out,%m0+1-0x20,%B1) CR_TAB
- AS2 (out,%m0-0x20,%A1));
+ op[2] = GEN_INT(AVR_IO_OFFSET);
+ if (AVR_XMEGA)
+ return (AS2 (out,%A0-%2,%A1) CR_TAB
+ AS2 (out,%B0-%2,%B1));
+ else
+ return (AS2 (out,%m0+1-%2,%B1) CR_TAB
+ AS2 (out,%m0-%2,%A1));
}
+ if (AVR_XMEGA)
+ return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
+ AS2 (sts,%B0,%B1));
+ else
return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
AS2 (sts,%m0,%A1));
}
@@ -2667,11 +2797,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__));
else
+ {
+ if (!AVR_XMEGA)
return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__) CR_TAB
AS2 (sbiw,r26,1) CR_TAB
AS2 (st,X,r26));
+ else
+ return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB
+ AS2 (st,X,r26) CR_TAB
+ AS2 (adiw,r26,1) CR_TAB
+ AS2 (st,X,__tmp_reg__) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
else
{
@@ -2679,14 +2818,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
return *l=2, (AS2 (st,X+,%A1) CR_TAB
AS2 (st,X,%B1));
else
+ {
+ if (!AVR_XMEGA)
return *l=3, (AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,%B1) CR_TAB
AS2 (st,-X,%A1));
+ else
+ return *l=3, (AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,1));
+ }
}
}
else
+ {
+ if (!AVR_XMEGA)
return *l=2, (AS2 (std,%0+1,%B1) CR_TAB
AS2 (st,%0,%A1));
+ else
+ return *l=2, (AS2 (st,%0,%A1) CR_TAB
+ AS2 (std,%0+1,%B1));
+ }
}
else if (GET_CODE (base) == PLUS)
{
@@ -2697,6 +2849,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (reg_base != REG_Y)
fatal_insn ("incorrect insn:",insn);
+ if (!AVR_XMEGA)
+ {
if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
AS2 (std,Y+63,%B1) CR_TAB
@@ -2710,11 +2864,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (subi,r28,lo8(%o0)) CR_TAB
AS2 (sbci,r29,hi8(%o0)));
}
+ else
+ {
+ if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
+ return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
+ AS2 (std,Y+62,%A1) CR_TAB
+ AS2 (std,Y+63,%B1) CR_TAB
+ AS2 (sbiw,r28,%o0-62));
+
+ return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(-%o0)) CR_TAB
+ AS2 (st,Y,%A1) CR_TAB
+ AS2 (std,Y+1,%B1) CR_TAB
+ AS2 (subi,r28,lo8(%o0)) CR_TAB
+ AS2 (sbci,r29,hi8(%o0)));
+ }
+ }
if (reg_base == REG_X)
{
/* (X + d) = R */
if (reg_src == REG_X)
{
+ if (!AVR_XMEGA)
+ {
*l = 7;
return (AS2 (mov,__tmp_reg__,r26) CR_TAB
AS2 (mov,__zero_reg__,r27) CR_TAB
@@ -2724,21 +2896,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS1 (clr,__zero_reg__) CR_TAB
AS2 (sbiw,r26,%o0));
}
+ else
+ {
+ *l = 7;
+ return (AS2 (mov,__tmp_reg__,r26) CR_TAB
+ AS2 (mov,__zero_reg__,r27) CR_TAB
+ AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,__tmp_reg__) CR_TAB
+ AS2 (st,X,__zero_reg__) CR_TAB
+ AS1 (clr,__zero_reg__) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+ if (!AVR_XMEGA)
+ {
*l = 4;
return (AS2 (adiw,r26,%o0+1) CR_TAB
AS2 (st,X,%B1) CR_TAB
AS2 (st,-X,%A1) CR_TAB
AS2 (sbiw,r26,%o0));
}
+ else
+ {
+ *l = 4;
+ return (AS2 (adiw,r26,%o0) CR_TAB
+ AS2 (st,X+,%A1) CR_TAB
+ AS2 (st,X,%B1) CR_TAB
+ AS2 (sbiw,r26,%o0+1));
+ }
+ }
+
+ if (!AVR_XMEGA)
return *l=2, (AS2 (std,%B0,%B1) CR_TAB
AS2 (std,%A0,%A1));
+ else
+ return *l=2, (AS2 (std,%A0,%A1) CR_TAB
+ AS2 (std,%B0,%B1));
}
else if (GET_CODE (base) == PRE_DEC) /* (--R) */
+ {
+ if (mem_volatile_p && AVR_XMEGA)
+ return *l = 4, (AS2 (sbiw,%r0,2) CR_TAB
+ AS2 (st,%p0+,%A1) CR_TAB
+ AS2 (st,%p0,%B1) CR_TAB
+ AS2 (sbiw,%r0,1));
+ else
return *l=2, (AS2 (st,%0,%B1) CR_TAB
AS2 (st,%0,%A1));
+ }
else if (GET_CODE (base) == POST_INC) /* (R++) */
{
- if (mem_volatile_p)
+ if (mem_volatile_p && !AVR_XMEGA)
{
if (REGNO (XEXP (base, 0)) == REG_X)
{
@@ -4874,6 +5082,16 @@ avr_asm_declare_function_name (FILE *fil
}
}
+ else if (cfun->machine->is_nmi)
+ {
+ if (strncmp (name, "__vector", strlen ("__vector")) != 0)
+ {
+ warning_at (DECL_SOURCE_LOCATION (decl), 0,
+ "%qs appears to be a misspelled nmi handler",
+ name);
+ }
+ }
+
ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
ASM_OUTPUT_LABEL (file, name);
}
@@ -5174,7 +5392,8 @@ avr_file_start (void)
/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
fputs ("__SREG__ = 0x3f\n"
"__SP_H__ = 0x3e\n"
- "__SP_L__ = 0x3d\n", asm_out_file);
+ "__SP_L__ = 0x3d\n"
+ "__CCP__ = 0x34\n", asm_out_file);
fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
@@ -6273,16 +6492,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
if (GET_CODE (operands[1]) == CONST_INT)
{
- if (INTVAL (operands[1]) < 0x40)
+ operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */
+ if (low_io_address_operand (operands[1], VOIDmode))
{
if (comp == EQ)
- output_asm_insn (AS2 (sbis,%m1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbis,%1-%4,%2), operands);
else
- output_asm_insn (AS2 (sbic,%m1-0x20,%2), operands);
+ output_asm_insn (AS2 (sbic,%1-%4,%2), operands);
}
else
{
- output_asm_insn (AS2 (in,__tmp_reg__,%m1-0x20), operands);
+ output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands);
if (comp == EQ)
output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
else
diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
--- gcc/config/avr/avr-c.c 2009-12-24 14:32:38.000000000 -0600
+++ gcc/config/avr/avr-c.c 2011-01-19 12:51:39.000000000 -0600
@@ -81,5 +81,18 @@ avr_cpu_cpp_builtins (struct cpp_reader
if (TARGET_NO_INTERRUPTS)
cpp_define (pfile, "__NO_INTERRUPTS__");
+
+ if (avr_current_arch->xmega)
+ {
+ cpp_define (pfile, "__AVR_XMEGA__");
+ cpp_define (pfile, "__AVR_HAVE_SPMX__");
+ }
+ if (avr_current_arch->have_rampx_y_d)
+ {
+ cpp_define (pfile, "__AVR_HAVE_RAMPX__");
+ cpp_define (pfile, "__AVR_HAVE_RAMPY__");
+ cpp_define (pfile, "__AVR_HAVE_RAMPD__");
+ }
+
}
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2009-07-17 13:49:03.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-01-19 12:51:39.000000000 -0600
@@ -36,7 +36,14 @@ const struct base_arch_s avr_arch_types[
{ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
- { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" }
+ { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
+ { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
+ { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
+ { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
};
/* List of all known AVR MCU types - if updated, it has to be kept
@@ -189,6 +196,39 @@ const struct mcu_type_s avr_mcu_types[]
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
+ /* Enhanced, == 256K. */
+ /* Xmega, <= 8K FLASH. */
+ /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */
+ { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
+ { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
+ { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
+ { "atxmega16x1", ARCH_AVRXMEGA2, "__AVR_ATxmega16X1__", 0, 0x2000, "x16x1" },
+ { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
+ { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
+ { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
+ /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */
+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
+ { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" },
+ { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" },
+ { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" },
+ /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */
+ { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" },
+ { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" },
+ { "atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0x2000, "x64a1u" },
+ /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
+ { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
+ { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
+ { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
+ { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
+ { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
+ { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
+ { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
+ { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
+ /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
+ { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
+ { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" },
+ { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" },
/* Assembler only. */
{ "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2010-01-11 17:12:14.000000000 -0600
+++ gcc/config/avr/avr.h 2011-01-19 12:51:39.000000000 -0600
@@ -45,11 +45,11 @@ struct base_arch_s {
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
- /* Reserved for xmega architecture. */
- int reserved;
+ /* Core is in Xmega family. */
+ int xmega;
- /* Reserved for xmega architecture. */
- int reserved2;
+ /* Core have RAMPX, RAMPY and RAMPD registers. */
+ int have_rampx_y_d;
/* Default start of data section address for architecture. */
int default_data_section_start;
@@ -75,7 +75,14 @@ enum avr_arch
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
- ARCH_AVR6
+ ARCH_AVR6,
+ ARCH_AVRXMEGA1,
+ ARCH_AVRXMEGA2,
+ ARCH_AVRXMEGA3,
+ ARCH_AVRXMEGA4,
+ ARCH_AVRXMEGA5,
+ ARCH_AVRXMEGA6,
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {
@@ -118,10 +125,18 @@ extern GTY(()) section *progmem_section;
#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
#define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
+#define AVR_XMEGA (avr_current_arch->xmega)
+#define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d)
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
+#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
+#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
+#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
+#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B)
+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
#define OVERRIDE_OPTIONS avr_override_options ()
@@ -842,6 +857,10 @@ struct GTY(()) machine_function
as specified by the "signal" attribute. */
int is_signal;
+ /* 'true' - if current function is a signal function
+ as specified by the "nmi" attribute. */
+ int is_nmi;
+
/* 'true' - if current function is a 'task' function
as specified by the "OS_task" attribute. */
int is_OS_task;
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/avr.md 2011-01-19 12:51:39.000000000 -0600
@@ -49,9 +49,6 @@
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
- (SREG_ADDR 0x5F)
- (RAMPZ_ADDR 0x5B)
-
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
@@ -2962,7 +2959,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
- return AS2 (cbi,%m0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (cbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
@@ -2974,7 +2972,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
- return AS2 (sbi,%m0-0x20,%2);
+ operands[3] = GEN_INT(AVR_IO_OFFSET);
+ return AS2 (sbi,%0-%3,%2);
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
--- gcc/config/avr/libgcc.S 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/libgcc.S 2011-01-19 12:51:39.000000000 -0600
@@ -637,11 +637,19 @@ __prologue_saves__:
in r29,__SP_H__
sub r28,r26
sbc r29,r27
+
+/* Restore stack pointer. */
+#if defined (__AVR_XMEGA__)
+ out __SP_L__,r28
+ out __SP_H__,r29
+#else
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#endif
+
#if defined (__AVR_HAVE_EIJMP_EICALL__)
eijmp
#else
@@ -679,11 +687,18 @@ __epilogue_restores__:
ldd r27,Y+1
add r28,r30
adc r29,__zero_reg__
+
+/* Restore stack pointer. */
+#if defined(__AVR_XMEGA__)
+ out __SP_L__,r28
+ out __SP_H__,r29
+#else
in __tmp_reg__,__SREG__
cli
out __SP_H__,r29
out __SREG__,__tmp_reg__
out __SP_L__,r28
+#endif
mov_l r28, r26
mov_h r29, r27
ret
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2009-12-24 13:53:57.000000000 -0600
+++ gcc/config/avr/predicates.md 2011-01-19 12:51:39.000000000 -0600
@@ -45,17 +45,23 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
+ (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return true if OP is a valid address of I/O space.
(define_predicate "io_address_operand"
(and (match_code "const_int")
- (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
+ (if_then_else (match_test "AVR_XMEGA")
+ (match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
+ (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))
;; Return 1 if OP is the zero constant for MODE.
(define_predicate "const0_operand"
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-01-18 17:58:12.000000000 -0600
+++ gcc/config/avr/t-avr 2011-01-19 12:51:39.000000000 -0600
@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
FPBIT = fp-bit.c
-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6
-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6
+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7
+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
@@ -223,7 +223,26 @@ MULTILIB_MATCHES = \
mmcu?avr51=mmcu?m3000s \
mmcu?avr51=mmcu?m3001b \
mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
+ mmcu?avr6=mmcu?atmega2561 \
+ mmcu?avrxmega2=mmcu?atxmega16a4 \
+ mmcu?avrxmega2=mmcu?atxmega16d4 \
+ mmcu?avrxmega2=mmcu?atxmega16x1 \
+ mmcu?avrxmega2=mmcu?atxmega32d4 \
+ mmcu?avrxmega2=mmcu?atxmega32a4 \
+ mmcu?avrxmega2=mmcu?atxmega32x1 \
+ mmcu?avrxmega4=mmcu?atxmega64a3 \
+ mmcu?avrxmega4=mmcu?atxmega64d3 \
+ mmcu?avrxmega5=mmcu?atxmega64a1 \
+ mmcu?avrxmega5=mmcu?atxmega64a1u \
+ mmcu?avrxmega6=mmcu?atxmega128a3 \
+ mmcu?avrxmega6=mmcu?atxmega128d3 \
+ mmcu?avrxmega6=mmcu?atxmega192a3 \
+ mmcu?avrxmega6=mmcu?atxmega192d3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3 \
+ mmcu?avrxmega6=mmcu?atxmega256a3b \
+ mmcu?avrxmega6=mmcu?atxmega256d3 \
+ mmcu?avrxmega7=mmcu?atxmega128a1 \
+ mmcu?avrxmega7=mmcu?atxmega128a1u
MULTILIB_EXCEPTIONS =

2132
devel/avr-gcc/files/patch-302-gcc-4.5.1-avrtiny10
View file

File diff suppressed because it is too large Load diff

52
devel/avr-gcc/files/patch-303-gcc-4.5.1-osmain
View file

@ -1,52 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-19 13:45:00.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 13:45:47.000000000 -0600
@@ -784,7 +784,8 @@ expand_prologue (void)
}
else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
|| (!AVR_XMEGA && cfun->machine->is_signal)
- || (!AVR_XMEGA && cfun->machine->is_OS_main))
+ || (!AVR_XMEGA && cfun->machine->is_OS_main)
+ || (AVR_XMEGA && cfun->machine->is_nmi))
{
insn =
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
@@ -963,7 +964,8 @@ expand_epilogue (void)
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
- || (!AVR_XMEGA && cfun->machine->is_signal))
+ || (!AVR_XMEGA && cfun->machine->is_signal)
+ || (AVR_XMEGA && cfun->machine->is_nmi))
{
emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
frame_pointer_rtx));
diff -Naurp gcc/function.c gcc/function.c
--- gcc/function.c 2010-02-26 09:58:57.000000000 -0600
+++ gcc/function.c 2011-01-19 13:45:48.000000000 -0600
@@ -4980,6 +4980,14 @@ contains (const_rtx insn, htab_t hash)
}
int
+prologue_contains (const_rtx insn)
+{
+ if (contains (insn, prologue_insn_hash))
+ return 1;
+ return 0;
+}
+
+int
prologue_epilogue_contains (const_rtx insn)
{
if (contains (insn, prologue_insn_hash))
diff -Naurp gcc/rtl.h gcc/rtl.h
--- gcc/rtl.h 2010-03-16 05:50:42.000000000 -0500
+++ gcc/rtl.h 2011-01-19 13:45:48.000000000 -0600
@@ -2296,6 +2296,7 @@ extern void print_inline_rtx (FILE *, co
/* In function.c */
extern void reposition_prologue_and_epilogue_notes (void);
+extern int prologue_contains (const_rtx);
extern int prologue_epilogue_contains (const_rtx);
extern int sibcall_epilogue_contains (const_rtx);
extern void mark_temp_addr_taken (rtx);

585
devel/avr-gcc/files/patch-304-gcc-4.5.1-builtins-v6
View file

@ -1,585 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-01-19 13:48:07.000000000 -0600
+++ gcc/config/avr/avr.c 2011-01-19 13:49:37.000000000 -0600
@@ -30,6 +30,7 @@
#include "insn-config.h"
#include "conditions.h"
#include "insn-attr.h"
+#include "insn-codes.h"
#include "flags.h"
#include "reload.h"
#include "tree.h"
@@ -39,7 +40,9 @@
#include "obstack.h"
#include "function.h"
#include "recog.h"
+#include "optabs.h"
#include "ggc.h"
+#include "langhooks.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
@@ -87,6 +90,8 @@ static bool avr_rtx_costs (rtx, int, int
static int avr_address_cost (rtx, bool);
static bool avr_return_in_memory (const_tree, const_tree);
static struct machine_function * avr_init_machine_status (void);
+static void avr_init_builtins (void);
+static rtx avr_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
static rtx avr_builtin_setjmp_frame_value (void);
static bool avr_hard_regno_scratch_ok (unsigned int);
static unsigned int avr_case_values_threshold (void);
@@ -197,6 +202,13 @@ static const struct attribute_spec avr_a
#undef TARGET_SCALAR_MODE_SUPPORTED_P
#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
+#undef TARGET_INIT_BUILTINS
+#define TARGET_INIT_BUILTINS avr_init_builtins
+
+#undef TARGET_EXPAND_BUILTIN
+#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+
+
/* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
static bool
avr_scalar_mode_supported_p (enum machine_mode mode)
@@ -7286,4 +7298,237 @@ unsigned int avr_case_values_threshold (
return (!AVR_HAVE_JMP_CALL || TARGET_CALL_PROLOGUES) ? 8 : 17;
}
+/* Codes for all the AVR builtins. */
+
+enum avr_builtins
+{
+ AVR_BUILTIN_SEI,
+ AVR_BUILTIN_CLI,
+ AVR_BUILTIN_WDR,
+ AVR_BUILTIN_SLEEP,
+ AVR_BUILTIN_SWAP,
+ AVR_BUILTIN_FMUL,
+ AVR_BUILTIN_FMULS,
+ AVR_BUILTIN_FMULSU,
+ AVR_BUILTIN_DELAY_CYCLES
+};
+
+#define def_builtin(NAME, TYPE, CODE) \
+do { \
+ add_builtin_function ((NAME), (TYPE), (CODE), BUILT_IN_MD, \
+ NULL, NULL_TREE); \
+} while (0)
+
+/* Set up all builtin functions for this target. */
+
+static void
+avr_init_builtins (void)
+{
+ tree void_ftype_void
+ = build_function_type (void_type_node, void_list_node);
+ tree uchar_ftype_uchar
+ = build_function_type_list (unsigned_char_type_node,
+ unsigned_char_type_node,
+ NULL_TREE);
+ tree uint_ftype_uchar_uchar
+ = build_function_type_list (unsigned_type_node,
+ unsigned_char_type_node,
+ unsigned_char_type_node,
+ NULL_TREE);
+ tree int_ftype_char_char
+ = build_function_type_list (integer_type_node,
+ char_type_node,
+ char_type_node,
+ NULL_TREE);
+ tree int_ftype_char_uchar
+ = build_function_type_list (integer_type_node,
+ char_type_node,
+ unsigned_char_type_node,
+ NULL_TREE);
+ tree void_ftype_ulong
+ = build_function_type_list (void_type_node,
+ long_unsigned_type_node,
+ NULL_TREE);
+
+ def_builtin ("__builtin_avr_sei", void_ftype_void, AVR_BUILTIN_SEI);
+ def_builtin ("__builtin_avr_cli", void_ftype_void, AVR_BUILTIN_CLI);
+ def_builtin ("__builtin_avr_wdr", void_ftype_void, AVR_BUILTIN_WDR);
+ def_builtin ("__builtin_avr_sleep", void_ftype_void, AVR_BUILTIN_SLEEP);
+
+ if (AVR_HAVE_MUL)
+ {
+ def_builtin ("__builtin_avr_fmul", uint_ftype_uchar_uchar,
+ AVR_BUILTIN_FMUL);
+ def_builtin ("__builtin_avr_fmuls", int_ftype_char_char,
+ AVR_BUILTIN_FMULS);
+ def_builtin ("__builtin_avr_fmulsu", int_ftype_char_uchar,
+ AVR_BUILTIN_FMULSU);
+ }
+
+ def_builtin ("__builtin_avr_swap", uchar_ftype_uchar, AVR_BUILTIN_SWAP);
+ def_builtin ("__builtin_avr_delay_cycles", void_ftype_ulong,
+ AVR_BUILTIN_DELAY_CYCLES);
+}
+
+struct builtin_description
+{
+ const enum insn_code icode;
+ const char *const name;
+ const enum avr_builtins code;
+};
+
+static const struct builtin_description bdesc_1arg[] =
+{
+ { CODE_FOR_swap, "__builtin_avr_swap", AVR_BUILTIN_SWAP }
+};
+
+static const struct builtin_description bdesc_2arg[] =
+{
+ { CODE_FOR_fmul, "__builtin_avr_fmul", AVR_BUILTIN_FMUL },
+ { CODE_FOR_fmuls, "__builtin_avr_fmuls", AVR_BUILTIN_FMULS },
+ { CODE_FOR_fmulsu, "__builtin_avr_fmulsu", AVR_BUILTIN_FMULSU }
+};
+
+/* Subroutine of avr_expand_builtin to take care of unop insns. */
+
+static rtx
+avr_expand_unop_builtin (enum insn_code icode, tree exp,
+ rtx target)
+{
+ rtx pat;
+ tree arg0 = CALL_EXPR_ARG (exp, 0);
+ rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+ enum machine_mode op0mode = GET_MODE (op0);
+ enum machine_mode tmode = insn_data[icode].operand[0].mode;
+ enum machine_mode mode0 = insn_data[icode].operand[1].mode;
+
+ if (! target
+ || GET_MODE (target) != tmode
+ || ! (*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+
+ if (op0mode == SImode && mode0 == HImode)
+ {
+ op0mode = HImode;
+ op0 = gen_lowpart (HImode, op0);
+ }
+ gcc_assert (op0mode == mode0 || op0mode == VOIDmode);
+
+ if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+
+ pat = GEN_FCN (icode) (target, op0);
+ if (! pat)
+ return 0;
+ emit_insn (pat);
+ return target;
+}
+
+/* Subroutine of avr_expand_builtin to take care of binop insns. */
+
+static rtx
+avr_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
+{
+ rtx pat;
+ tree arg0 = CALL_EXPR_ARG (exp, 0);
+ tree arg1 = CALL_EXPR_ARG (exp, 1);
+ rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+ rtx op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+ enum machine_mode op0mode = GET_MODE (op0);
+ enum machine_mode op1mode = GET_MODE (op1);
+ enum machine_mode tmode = insn_data[icode].operand[0].mode;
+ enum machine_mode mode0 = insn_data[icode].operand[1].mode;
+ enum machine_mode mode1 = insn_data[icode].operand[2].mode;
+
+ if (! target
+ || GET_MODE (target) != tmode
+ || ! (*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+
+ if ((op0mode == SImode || op0mode == VOIDmode) && mode0 == HImode)
+ {
+ op0mode = HImode;
+ op0 = gen_lowpart (HImode, op0);
+ }
+ if ((op1mode == SImode || op1mode == VOIDmode) && mode1 == HImode)
+ {
+ op1mode = HImode;
+ op1 = gen_lowpart (HImode, op1);
+ }
+ /* In case the insn wants input operands in modes different from
+ the result, abort. */
+ gcc_assert ((op0mode == mode0 || op0mode == VOIDmode)
+ && (op1mode == mode1 || op1mode == VOIDmode));
+
+ if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+
+ pat = GEN_FCN (icode) (target, op0, op1);
+ if (! pat)
+ return 0;
+
+ emit_insn (pat);
+ return target;
+}
+
+/* Expand an expression EXP that calls a built-in function,
+ with result going to TARGET if that's convenient
+ (and in mode MODE if that's convenient).
+ SUBTARGET may be used as the target for computing one of EXP's operands.
+ IGNORE is nonzero if the value is to be ignored. */
+
+static rtx
+avr_expand_builtin (tree exp, rtx target,
+ rtx subtarget ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
+ int ignore ATTRIBUTE_UNUSED)
+{
+ size_t i;
+ const struct builtin_description *d;
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
+ rtx pat;
+ tree arg0;
+ rtx op0;
+
+ switch (fcode)
+ {
+ case AVR_BUILTIN_SEI:
+ emit_insn (gen_enable_interrupt ());
+ return 0;
+ case AVR_BUILTIN_CLI:
+ emit_insn (gen_disable_interrupt ());
+ return 0;
+ case AVR_BUILTIN_WDR:
+ emit_insn (gen_wdr ());
+ return 0;
+ case AVR_BUILTIN_SLEEP:
+ emit_insn (gen_sleep ());
+ return 0;
+ case AVR_BUILTIN_DELAY_CYCLES:
+ {
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+
+ if (!CONSTANT_P (op0))
+ error ("__builtin_avr_delay_cycles expects an integer constant.");
+
+ emit_insn (gen_delay_cycles (op0));
+ return 0;
+ }
+ }
+
+ for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_1arg); i++, d++)
+ if (d->code == fcode)
+ return avr_expand_unop_builtin (d->icode, exp, target);
+
+ for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++)
+ if (d->code == fcode)
+ return avr_expand_binop_builtin (d->icode, exp, target);
+
+ gcc_unreachable ();
+}
+
#include "gt-avr.h"
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-01-19 13:45:00.000000000 -0600
+++ gcc/config/avr/avr.md 2011-01-19 13:49:37.000000000 -0600
@@ -51,14 +51,29 @@
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
- (UNSPEC_SEI 2)
- (UNSPEC_CLI 3)
+ (UNSPEC_SWAP 2)
+ (UNSPEC_FMUL 3)
+ (UNSPEC_FMULS 4)
+ (UNSPEC_FMULSU 5)
+
(UNSPECV_PROLOGUE_SAVES 0)
(UNSPECV_EPILOGUE_RESTORES 1)
(UNSPECV_WRITE_SP_IRQ_ON 2)
(UNSPECV_WRITE_SP_IRQ_OFF 3)
- (UNSPECV_GOTO_RECEIVER 4)])
+ (UNSPECV_GOTO_RECEIVER 4)
+ (UNSPECV_SEI 5)
+ (UNSPECV_CLI 6)
+ (UNSPECV_NOP 7)
+ (UNSPECV_NOP2 8)
+ (UNSPECV_SLEEP 9)
+ (UNSPECV_WDR 10)
+
+ (UNSPECV_DELAY_CYCLES 100)
+ (UNSPECV_DELAY_CYCLES_1 101)
+ (UNSPECV_DELAY_CYCLES_2 102)
+ (UNSPECV_DELAY_CYCLES_3 103)
+ (UNSPECV_DELAY_CYCLES_4 104)])
(include "predicates.md")
(include "constraints.md")
@@ -2813,13 +2828,6 @@
(const_int 1))
(const_int 3)])])
-(define_insn "nop"
- [(const_int 0)]
- ""
- "nop"
- [(set_attr "cc" "none")
- (set_attr "length" "1")])
-
; indirect jump
(define_expand "indirect_jump"
@@ -3221,7 +3229,7 @@
;; Enable Interrupts
(define_insn "enable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_SEI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
""
"sei"
[(set_attr "length" "1")
@@ -3230,7 +3238,7 @@
;; Disable Interrupts
(define_insn "disable_interrupt"
- [(unspec [(const_int 0)] UNSPEC_CLI)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
""
"cli"
[(set_attr "length" "1")
@@ -3330,3 +3338,219 @@
expand_epilogue ();
DONE;
}")
+
+;;delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay_cycles_delay
+;; delay_cycles
+
+(define_expand "delay_cycles"
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "i")]
+ UNSPECV_DELAY_CYCLES)]
+ ""
+ "
+ rtx loop_reg;
+ unsigned int cycles = INTVAL (operands[0]);
+ if (IN_RANGE(cycles, 83886082, 0xFFFFFFFF))
+ {
+ unsigned int loop_count = ((cycles - 9) / 6) + 1;
+ unsigned int cycles_used = (((loop_count - 1) * 6) + 9);
+ emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 262145, 83886081))
+ {
+ unsigned int loop_count = ((cycles - 7) / 5) + 1;
+ if (loop_count > 0xFFFFFF)
+ loop_count = 0xFFFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 5) + 7);
+ emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 768, 262144))
+ {
+ unsigned int loop_count = ((cycles - 5) / 4) + 1;
+ if (loop_count > 0xFFFF)
+ loop_count = 0xFFFF;
+ unsigned int cycles_used = (((loop_count - 1) * 4) + 5);
+ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
+ cycles -= cycles_used;
+ }
+ if (IN_RANGE(cycles, 6, 767))
+ {
+ unsigned int loop_count = (cycles/ 3);
+ if (loop_count > 255)
+ loop_count = 255;
+ unsigned int cycles_used = (loop_count * 3);
+ emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode)));
+ cycles -= cycles_used;
+ }
+ while (cycles >= 2)
+ {
+ emit_insn (gen_nop2 ());
+ cycles -= 2;
+ }
+ if (cycles == 1)
+ {
+ emit_insn (gen_nop ());
+ cycles--;
+ }
+ DONE;
+ ")
+
+(define_insn "delay_cycles_1"
+[(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_1)
+ (match_operand:QI 0 "immediate_operand" "")
+ (clobber (match_scratch:QI 1 "=&d"))]
+ ""
+ " ldi %1,lo8(%0)
+ 1:dec %1
+ brne 1b"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_2)
+ (match_operand:HI 0 "immediate_operand" "")
+ (clobber (match_scratch:HI 1 "=&w"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ 1:sbiw %A1,1
+ brne 1b"
+ [(set_attr "length" "4")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_3"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_3)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ brne 1b"
+ [(set_attr "length" "7")
+ (set_attr "cc" "clobber")])
+
+(define_insn "delay_cycles_4"
+ [(unspec_volatile [(const_int 0)] UNSPECV_DELAY_CYCLES_4)
+ (match_operand:SI 0 "immediate_operand" "")
+ (clobber (match_scratch:SI 1 "=&d"))]
+ ""
+ " ldi %A1,lo8(%0)
+ ldi %B1,hi8(%0)
+ ldi %C1,hlo8(%0)
+ ldi %D1,hhi8(%0)
+ 1:subi %A1,1
+ sbci %B1,0
+ sbci %C1,0
+ sbci %D1,0
+ brne 1b"
+ [(set_attr "length" "9")
+ (set_attr "cc" "clobber")])
+
+;; CPU instructions
+
+;; NOP
+(define_insn "nop"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP)]
+ ""
+ "nop"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; NOP2
+(define_insn "nop2"
+ [(unspec_volatile [(const_int 0)] UNSPECV_NOP2)]
+ ""
+ "rjmp ."
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; SEI, Enable Interrupts
+;(define_insn "sei"
+; [(unspec_volatile [(const_int 0)] UNSPECV_SEI)]
+; ""
+; "sei"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; CLI, Disable Interrupts
+;(define_insn "cli"
+; [(unspec_volatile [(const_int 0)] UNSPECV_CLI)]
+; ""
+; "cli"
+; [(set_attr "length" "1")
+; (set_attr "cc" "none")
+; ])
+
+;; SLEEP
+(define_insn "sleep"
+ [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)]
+ ""
+ "sleep"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; WDR
+(define_insn "wdr"
+ [(unspec_volatile [(const_int 0)] UNSPECV_WDR)]
+ ""
+ "wdr"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")
+ ])
+
+;; SWAP
+(define_insn "swap"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
+ UNSPEC_SWAP))]
+ ""
+ "swap %0"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+;; FMUL
+(define_insn "fmul"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMUL))]
+ "AVR_HAVE_MUL"
+ "fmul %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULS
+(define_insn "fmuls"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULS))]
+ "AVR_HAVE_MUL"
+ "fmuls %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
+;; FMULSU
+(define_insn "fmulsu"
+ [(set (match_operand:HI 0 "a_register_operand" "=r")
+ (unspec:HI [(match_operand:QI 1 "a_register_operand" "r")
+ (match_operand:QI 2 "a_register_operand" "r")]
+ UNSPEC_FMULSU))]
+ "AVR_HAVE_MUL"
+ "fmulsu %1,%2
+ movw %0,r0
+ clr r1"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2011-01-19 13:03:59.000000000 -0600
+++ gcc/config/avr/predicates.md 2011-01-19 13:49:37.000000000 -0600
@@ -27,6 +27,11 @@
(and (match_code "reg")
(match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
+;; Registers from r16 to 24.
+(define_predicate "a_register_operand"
+ (and (match_code "reg")
+ (match_test "REGNO (op) >= 16 && REGNO (op) <= 24")))
+
(define_predicate "even_register_operand"
(and (match_code "reg")
(and (match_test "REGNO (op) <= 31")

49
devel/avr-gcc/files/patch-305-gcc-4.5.1-avrtiny10-non-fixedpoint
View file

@ -1,49 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-02-07 16:17:20.000000000 -0600
+++ gcc/config/avr/avr.c 2011-02-07 16:12:53.000000000 -0600
@@ -202,6 +202,9 @@ static const struct attribute_spec avr_a
#undef TARGET_SCALAR_MODE_SUPPORTED_P
#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
+#undef TARGET_FIXED_POINT_SUPPORTED_P
+#define TARGET_FIXED_POINT_SUPPORTED_P avr_fixed_point_supported_p
+
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS avr_init_builtins
@@ -219,6 +222,17 @@ static const struct attribute_spec avr_a
return default_scalar_mode_supported_p (mode);
}
+ /* Implement TARGET_FIXED_POINT_SUPPORTED_P. */
+ static bool
+ avr_fixed_point_supported_p ()
+ {
+ if (AVR_TINY)
+ return false;
+
+ return default_fixed_point_supported_p ();
+ }
+
+
struct gcc_target targetm = TARGET_INITIALIZER;
void
diff -Naurp gcc/config/fixed-bit.c gcc/config/fixed-bit.c
--- gcc/config/fixed-bit.c 2009-04-09 10:00:19.000000000 -0500
+++ gcc/config/fixed-bit.c 2011-02-07 16:12:53.000000000 -0600
@@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTI
Floating-point: SF, DF
Ex: If we define FROM_QQ and TO_SI, the conversion from QQ to SI is
generated. */
-
+#if !defined (__AVR_TINY__)
#include "tconfig.h"
#include "tsystem.h"
#include "coretypes.h"
@@ -1213,4 +1213,4 @@ SATFRACT (FROM_FLOAT_C_TYPE a)
return c;
}
#endif /* defined(SATFRACT) && FROM_TYPE == 3 && TO_TYPE == 4 */
-
+#endif /* __AVR_TINY__ */

49
devel/avr-gcc/files/patch-306-gcc-4.5.1-option-list-devices
View file

@ -1,49 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-02-11 14:56:08.000000000 -0600
+++ gcc/config/avr/avr.c 2011-02-11 14:54:05.000000000 -0600
@@ -211,6 +211,8 @@ static const struct attribute_spec avr_a
#undef TARGET_EXPAND_BUILTIN
#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+#undef TARGET_HELP
+#define TARGET_HELP avr_target_help
/* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
static bool
@@ -232,7 +234,24 @@ static const struct attribute_spec avr_a
return default_fixed_point_supported_p ();
}
-
+/* Implement TARGET_HELP. */
+void
+avr_target_help (void)
+{
+ if (avr_list_supported_parts)
+ {
+ const struct mcu_type_s *list_part;
+ fprintf (stdout, "List of parts supported by avr-gcc:\n");
+ for (list_part = &avr_mcu_types[0]; (list_part + 1)->name; list_part++)
+ {
+ if (!list_part->macro)
+ list_part++;
+ fprintf (stdout, "%-20s%s\n", list_part->name, list_part->macro);
+ }
+ fprintf (stdout, "\n");
+ }
+}
+
struct gcc_target targetm = TARGET_INITIALIZER;
void
diff -Naurp gcc/config/avr/avr.opt gcc/config/avr/avr.opt
--- gcc/config/avr/avr.opt 2009-10-08 13:28:48.000000000 -0500
+++ gcc/config/avr/avr.opt 2011-02-11 14:53:20.000000000 -0600
@@ -58,3 +58,7 @@ Relax branches
mpmem-wrap-around
Target Report
Make the linker relaxation machine assume that a program counter wrap-around occures.
+
+mlist-devices
+Target RejectNegative Var(avr_list_supported_parts)
+Print the list of parts supported while printing --target-help

328
devel/avr-gcc/files/patch-400-gcc-4.5.1-new-devices
View file

@ -1,328 +0,0 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-02-07 14:19:27.000000000 -0600
+++ gcc/config/avr/avr-devices.c 2011-02-07 14:21:41.000000000 -0600
@@ -75,15 +75,23 @@ const struct mcu_type_s avr_mcu_types[]
{ "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" },
{ "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0x0060, "tn13a" },
{ "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" },
+ { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" },
{ "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" },
+ { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" },
+ { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 0, 0x0060, "tn4313" },
{ "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" },
+ { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" },
{ "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" },
+ { "attiny84a", ARCH_AVR25, "__AVR_ATtiny84A__", 0, 0x0060, "tn84a" },
{ "attiny25", ARCH_AVR25, "__AVR_ATtiny25__", 1, 0x0060, "tn25" },
{ "attiny45", ARCH_AVR25, "__AVR_ATtiny45__", 0, 0x0060, "tn45" },
{ "attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0x0060, "tn85" },
{ "attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0x0060, "tn261" },
+ { "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__", 1, 0x0060, "tn261a" },
{ "attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0x0060, "tn461" },
+ { "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__", 0, 0x0060, "tn461a" },
{ "attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0x0060, "tn861" },
+ { "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__", 0, 0x0060, "tn861a" },
{ "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__", 0, 0x0060, "tn43u" },
{ "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" },
{ "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
@@ -105,21 +113,19 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
{ "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
{ "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
- { "attiny327", ARCH_AVR35, "__AVR_ATtiny327__", 0, 0x0100, "tn327" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
+ { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
+ { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
{ "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0x0100, "m88p" },
+ { "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__", 0, 0x0100, "m88pa" },
{ "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__", 0, 0x0060, "m8515" },
{ "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__", 0, 0x0060, "m8535" },
- { "atmega8c1", ARCH_AVR4, "__AVR_ATmega8C1__", 0, 0x0100, "m8c1" },
- { "atmega8m1", ARCH_AVR4, "__AVR_ATmega8M1__", 0, 0x0100, "m8m1" },
{ "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__", 0, 0x0100, "m8hva" },
- { "atmega4hvd", ARCH_AVR4, "__AVR_ATmega4HVD__", 0, 0x0100, "m4hvd" },
- { "atmega8hvd", ARCH_AVR4, "__AVR_ATmega8HVD__", 0, 0x0100, "m8hvd" },
{ "at90pwm1", ARCH_AVR4, "__AVR_AT90PWM1__", 0, 0x0100, "90pwm1" },
{ "at90pwm2", ARCH_AVR4, "__AVR_AT90PWM2__", 0, 0x0100, "90pwm2" },
{ "at90pwm2b", ARCH_AVR4, "__AVR_AT90PWM2B__", 0, 0x0100, "90pwm2b" },
@@ -128,41 +134,78 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
/* Enhanced, > 8K, <= 64K. */
{ "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
+ { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
{ "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
+ { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
{ "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
{ "atmega162", ARCH_AVR5, "__AVR_ATmega162__", 0, 0x0100, "m162" },
{ "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
+ { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0060, "m164a" },
{ "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
{ "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
+ { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
{ "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
{ "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
+ { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
{ "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
{ "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
+ { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
{ "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
+ { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
+ { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
+ { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
+ { "atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 1, 0x0100, "m16hvbrevb" },
+ { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
+ { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
{ "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
{ "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
+ { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0060, "m324a" },
{ "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
+ { "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__", 0, 0x0100, "m324pa" },
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
+ { "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
+ { "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
+ { "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
+ { "atmega329a", ARCH_AVR5, "__AVR_ATmega329A__", 0, 0x0100, "m329a" },
{ "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__", 0, 0x0100, "m329p" },
+ { "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__", 0, 0x0100, "m329pa" },
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
+ { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
+ { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
{ "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
{ "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
{ "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
{ "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
+ { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
{ "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__", 0, 0x0100, "m644p" },
+ { "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__", 0, 0x0100, "m644pa" },
+ { "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__", 0, 0x0100, "m645a" },
+ { "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__", 0, 0x0100, "m645p" },
{ "atmega645", ARCH_AVR5, "__AVR_ATmega645__", 0, 0x0100, "m645" },
{ "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__", 0, 0x0100, "m6450" },
+ { "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__", 0, 0x0100, "m6450a" },
+ { "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__", 0, 0x0100, "m6450p" },
{ "atmega649", ARCH_AVR5, "__AVR_ATmega649__", 0, 0x0100, "m649" },
+ { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
+ { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
{ "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
- { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
- { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m23hvb" },
+ { "atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__", 0, 0x0100, "m6490a" },
+ { "atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__", 0, 0x0100, "m6490p" },
+ { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
+ { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
+ { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
+ { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
+ { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
{ "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
{ "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
{ "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
@@ -180,6 +223,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__", 0, 0x0100, "usb646" },
{ "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__", 0, 0x0100, "usb647" },
{ "at94k", ARCH_AVR5, "__AVR_AT94K__", 0, 0x0060, "at94k" },
+ { "m3000", ARCH_AVR5, "__AVR_M3000__", 0, 0x1000, "m3000" },
/* Enhanced, == 128K. */
{ "avr51", ARCH_AVR51, NULL, 0, 0x0100, "m128" },
{ "atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0x0100, "m128" },
@@ -190,9 +234,6 @@ const struct mcu_type_s avr_mcu_types[]
{ "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0x0100, "can128" },
{ "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0x0100, "usb1286" },
{ "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0x0100, "usb1286" },
- { "m3000f", ARCH_AVR51, "__AVR_M3000F__", 0, 0x1000, "m3000f" },
- { "m3000s", ARCH_AVR51, "__AVR_M3000S__", 0, 0x1000, "m3000f" },
- { "m3001b", ARCH_AVR51, "__AVR_M3001B__", 0, 0x1000, "m3000f" },
/* 3-Byte PC. */
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
{ "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
@@ -220,11 +261,13 @@ const struct mcu_type_s avr_mcu_types[]
/* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
{ "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
{ "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
+ { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
{ "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
{ "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
{ "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
{ "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
{ "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
+ { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
{ "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
/* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
{ "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-02-07 14:19:27.000000000 -0600
+++ gcc/config/avr/t-avr 2011-02-07 14:23:58.000000000 -0600
@@ -116,16 +116,28 @@ MULTILIB_MATCHES = \
mmcu?avr25=mmcu?attiny13 \
mmcu?avr25=mmcu?attiny13a \
mmcu?avr25=mmcu?attiny2313 \
+ mmcu?avr25=mmcu?attiny2313a \
mmcu?avr25=mmcu?attiny24 \
+ mmcu?avr25=mmcu?attiny24a \
mmcu?avr25=mmcu?attiny44 \
+ mmcu?avr25=mmcu?attiny44a \
+ mmcu?avr25=mmcu?attiny45 \
mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny84a \
mmcu?avr25=mmcu?attiny25 \
mmcu?avr25=mmcu?attiny45 \
mmcu?avr25=mmcu?attiny85 \
mmcu?avr25=mmcu?attiny261 \
+ mmcu?avr25=mmcu?attiny261a \
+ mmcu?avr25=mmcu?attiny4313 \
mmcu?avr25=mmcu?attiny461 \
+ mmcu?avr25=mmcu?attiny461a \
mmcu?avr25=mmcu?attiny861 \
mmcu?avr25=mmcu?attiny43u \
+ mmcu?avr25=mmcu?attiny84 \
+ mmcu?avr25=mmcu?attiny85 \
+ mmcu?avr25=mmcu?attiny861 \
+ mmcu?avr25=mmcu?attiny861a \
mmcu?avr25=mmcu?attiny87 \
mmcu?avr25=mmcu?attiny48 \
mmcu?avr25=mmcu?attiny88 \
@@ -140,65 +152,90 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?atmega16u2 \
mmcu?avr35=mmcu?atmega32u2 \
mmcu?avr35=mmcu?attiny167 \
- mmcu?avr35=mmcu?attiny327 \
mmcu?avr4=mmcu?atmega48 \
+ mmcu?avr4=mmcu?atmega48a \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
mmcu?avr4=mmcu?atmega8515 \
mmcu?avr4=mmcu?atmega8535 \
mmcu?avr4=mmcu?atmega88 \
+ mmcu?avr4=mmcu?atmega88a \
mmcu?avr4=mmcu?atmega88p \
+ mmcu?avr4=mmcu?atmega88pa \
mmcu?avr4=mmcu?atmega8hva \
- mmcu?avr4=mmcu?atmega4hvd \
- mmcu?avr4=mmcu?atmega8hvd \
- mmcu?avr4=mmcu?atmega8c1 \
- mmcu?avr4=mmcu?atmega8m1 \
mmcu?avr4=mmcu?at90pwm1 \
mmcu?avr4=mmcu?at90pwm2 \
mmcu?avr4=mmcu?at90pwm2b \
mmcu?avr4=mmcu?at90pwm3 \
mmcu?avr4=mmcu?at90pwm3b \
mmcu?avr4=mmcu?at90pwm81 \
+ mmcu?avr5=mmcu?at90pwm161 \
mmcu?avr5=mmcu?atmega16 \
+ mmcu?avr5=mmcu?atmega16a \
mmcu?avr5=mmcu?atmega161 \
mmcu?avr5=mmcu?atmega162 \
mmcu?avr5=mmcu?atmega163 \
+ mmcu?avr5=mmcu?atmega164a \
mmcu?avr5=mmcu?atmega164p \
mmcu?avr5=mmcu?atmega165 \
+ mmcu?avr5=mmcu?atmega165a \
mmcu?avr5=mmcu?atmega165p \
mmcu?avr5=mmcu?atmega168 \
+ mmcu?avr5=mmcu?atmega168a \
mmcu?avr5=mmcu?atmega168p \
mmcu?avr5=mmcu?atmega169 \
+ mmcu?avr5=mmcu?atmega169a \
mmcu?avr5=mmcu?atmega169p \
+ mmcu?avr5=mmcu?atmega169pa \
mmcu?avr5=mmcu?atmega32 \
mmcu?avr5=mmcu?atmega323 \
+ mmcu?avr5=mmcu?atmega324a \
mmcu?avr5=mmcu?atmega324p \
+ mmcu?avr5=mmcu?atmega324pa \
mmcu?avr5=mmcu?atmega325 \
+ mmcu?avr5=mmcu?atmega325a \
mmcu?avr5=mmcu?atmega325p \
mmcu?avr5=mmcu?atmega3250 \
+ mmcu?avr5=mmcu?atmega3250a \
mmcu?avr5=mmcu?atmega3250p \
+ mmcu?avr5=mmcu?atmega328 \
mmcu?avr5=mmcu?atmega328p \
mmcu?avr5=mmcu?atmega329 \
+ mmcu?avr5=mmcu?atmega329a \
mmcu?avr5=mmcu?atmega329p \
+ mmcu?avr5=mmcu?atmega329pa \
mmcu?avr5=mmcu?atmega3290 \
+ mmcu?avr5=mmcu?atmega3290a \
mmcu?avr5=mmcu?atmega3290p \
mmcu?avr5=mmcu?atmega406 \
mmcu?avr5=mmcu?atmega64 \
mmcu?avr5=mmcu?atmega640 \
mmcu?avr5=mmcu?atmega644 \
+ mmcu?avr5=mmcu?atmega644a \
mmcu?avr5=mmcu?atmega644p \
+ mmcu?avr5=mmcu?atmega644pa \
mmcu?avr5=mmcu?atmega645 \
+ mmcu?avr5=mmcu?atmega645a \
+ mmcu?avr5=mmcu?atmega645p \
mmcu?avr5=mmcu?atmega6450 \
+ mmcu?avr5=mmcu?atmega6450a \
+ mmcu?avr5=mmcu?atmega6450p \
mmcu?avr5=mmcu?atmega649 \
+ mmcu?avr5=mmcu?atmega649a \
+ mmcu?avr5=mmcu?atmega649p \
mmcu?avr5=mmcu?atmega6490 \
+ mmcu?avr5=mmcu?atmega6490a \
+ mmcu?avr5=mmcu?atmega6490p \
mmcu?avr5=mmcu?atmega16hva \
+ mmcu?avr5=mmcu?atmega16hva2 \
mmcu?avr5=mmcu?atmega16hvb \
+ mmcu?avr5=mmcu?atmega16hvbrevb \
mmcu?avr5=mmcu?atmega32hvb \
+ mmcu?avr5=mmcu?atmega32hvbrevb \
mmcu?avr5=mmcu?at90can32 \
mmcu?avr5=mmcu?at90can64 \
mmcu?avr5=mmcu?at90pwm216 \
mmcu?avr5=mmcu?at90pwm316 \
- mmcu?avr5=mmcu?atmega16c1 \
mmcu?avr5=mmcu?atmega32c1 \
mmcu?avr5=mmcu?atmega64c1 \
mmcu?avr5=mmcu?atmega16m1 \
@@ -207,6 +244,7 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega16u4 \
mmcu?avr5=mmcu?atmega32u4 \
mmcu?avr5=mmcu?atmega32u6 \
+ mmcu?avr5=mmcu?atmega64hve \
mmcu?avr5=mmcu?at90scr100 \
mmcu?avr5=mmcu?at90usb646 \
mmcu?avr5=mmcu?at90usb647 \
@@ -219,9 +257,7 @@ MULTILIB_MATCHES = \
mmcu?avr51=mmcu?at90can128 \
mmcu?avr51=mmcu?at90usb1286 \
mmcu?avr51=mmcu?at90usb1287 \
- mmcu?avr51=mmcu?m3000f \
- mmcu?avr51=mmcu?m3000s \
- mmcu?avr51=mmcu?m3001b \
+ mmcu?avr51=mmcu?m3000 \
mmcu?avr6=mmcu?atmega2560 \
mmcu?avr6=mmcu?atmega2561 \
mmcu?avrxmega2=mmcu?atxmega16a4 \
@@ -235,11 +271,13 @@ MULTILIB_MATCHES = \
mmcu?avrxmega5=mmcu?atxmega64a1 \
mmcu?avrxmega5=mmcu?atxmega64a1u \
mmcu?avrxmega6=mmcu?atxmega128a3 \
+ mmcu?avrxmega6=mmcu?atxmega128b1 \
mmcu?avrxmega6=mmcu?atxmega128d3 \
mmcu?avrxmega6=mmcu?atxmega192a3 \
mmcu?avrxmega6=mmcu?atxmega192d3 \
mmcu?avrxmega6=mmcu?atxmega256a3 \
mmcu?avrxmega6=mmcu?atxmega256a3b \
+ mmcu?avrxmega6=mmcu?atxmega256a3bu \
mmcu?avrxmega6=mmcu?atxmega256d3 \
mmcu?avrxmega7=mmcu?atxmega128a1 \
mmcu?avrxmega7=mmcu?atxmega128a1u \

46
devel/avr-gcc/files/patch-401-gcc-4.5.1-atmega32_5_50_90_pa
View file

@ -1,46 +0,0 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-02-17 12:04:53.000000000 -0600
+++ gcc/config/avr/avr-devices.c 2011-02-16 15:14:00.000000000 -0600
@@ -166,9 +166,11 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
{ "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
+ { "atmega325pa", ARCH_AVR5, "__AVR_ATmega325PA__", 0, 0x0100, "m325pa" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
{ "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
+ { "atmega3250pa", ARCH_AVR5, "__AVR_ATmega3250PA__", 0, 0x0100, "m3250pa" },
{ "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
@@ -178,6 +180,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
{ "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
+ { "atmega3290pa", ARCH_AVR5, "__AVR_ATmega3290PA__", 0, 0x0100, "m3290pa" },
{ "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
{ "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
{ "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-02-17 12:04:53.000000000 -0600
+++ gcc/config/avr/t-avr 2011-02-16 15:15:18.000000000 -0600
@@ -195,9 +195,11 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega325 \
mmcu?avr5=mmcu?atmega325a \
mmcu?avr5=mmcu?atmega325p \
+ mmcu?avr5=mmcu?atmega325pa \
mmcu?avr5=mmcu?atmega3250 \
mmcu?avr5=mmcu?atmega3250a \
mmcu?avr5=mmcu?atmega3250p \
+ mmcu?avr5=mmcu?atmega3250pa \
mmcu?avr5=mmcu?atmega328 \
mmcu?avr5=mmcu?atmega328p \
mmcu?avr5=mmcu?atmega329 \
@@ -207,6 +209,7 @@ MULTILIB_MATCHES = \
mmcu?avr5=mmcu?atmega3290 \
mmcu?avr5=mmcu?atmega3290a \
mmcu?avr5=mmcu?atmega3290p \
+ mmcu?avr5=mmcu?atmega3290pa \
mmcu?avr5=mmcu?atmega406 \
mmcu?avr5=mmcu?atmega64 \
mmcu?avr5=mmcu?atmega640 \

22
devel/avr-gcc/files/patch-402-gcc-4.5.1-attiny1634
View file

@ -1,22 +0,0 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-05-13 17:35:31.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-05-13 17:43:10.000000000 -0500
@@ -113,6 +113,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
{ "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
{ "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
+ { "attiny1634", ARCH_AVR35, "__AVR_ATtiny1634__", 0, 0x0100, "tn1634" },
/* Enhanced, <= 8K. */
{ "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-05-13 17:35:31.000000000 -0500
+++ gcc/config/avr/t-avr 2011-05-13 17:37:41.000000000 -0500
@@ -152,6 +152,7 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?atmega16u2 \
mmcu?avr35=mmcu?atmega32u2 \
mmcu?avr35=mmcu?attiny167 \
+ mmcu?avr35=mmcu?attiny1634 \
mmcu?avr4=mmcu?atmega48 \
mmcu?avr4=mmcu?atmega48a \
mmcu?avr4=mmcu?atmega48p \

22
devel/avr-gcc/files/patch-403-gcc-4.5.1-atmega48pa
View file

@ -1,22 +0,0 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-06-20 12:23:54.000000000 +0530
+++ gcc/config/avr/avr-devices.c 2011-06-20 12:11:26.000000000 +0530
@@ -119,6 +119,7 @@ const struct mcu_type_s avr_mcu_types[]
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
{ "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
+ { "atmega48pa", ARCH_AVR4, "__AVR_ATmega48PA__", 0, 0x0100, "m48pa" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
{ "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
--- gcc/config/avr/t-avr 2011-06-20 12:23:54.000000000 +0530
+++ gcc/config/avr/t-avr 2011-06-20 12:11:26.000000000 +0530
@@ -155,6 +155,7 @@ MULTILIB_MATCHES = \
mmcu?avr35=mmcu?attiny1634 \
mmcu?avr4=mmcu?atmega48 \
mmcu?avr4=mmcu?atmega48a \
+ mmcu?avr4=mmcu?atmega48pa \
mmcu?avr4=mmcu?atmega48p \
mmcu?avr4=mmcu?atmega8 \
mmcu?avr4=mmcu?atmega8515 \

14
devel/avr-gcc/files/patch-500-gcc-4.5.1-bug13473
View file

@ -1,14 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr.c 2011-06-09 15:33:10.000000000 -0500
@@ -3350,8 +3350,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (out,%m0-%2,%A1));
}
if (AVR_XMEGA)
- return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB
- AS2 (sts,%B0,%B1));
+ return *l = 4, (AS2 (sts,%m0,%A1) CR_TAB
+ AS2 (sts,%m0+1,%B1));
else
return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
AS2 (sts,%m0,%A1));

17
devel/avr-gcc/files/patch-501-gcc-4.5.1-bug13579
View file

@ -1,17 +0,0 @@
--- gcc/ipa-pure-const.c 2010-04-02 14:54:46.000000000 -0500
+++ gcc/ipa-pure-const.c 2011-02-24 16:10:26.000000000 -0600
@@ -416,6 +416,14 @@ check_stmt (gimple_stmt_iterator *gsip,
print_gimple_stmt (dump_file, stmt, 0, 0);
}
+ if (gimple_has_volatile_ops (stmt))
+ {
+ local->pure_const_state = IPA_NEITHER;
+ if (dump_file)
+ fprintf (dump_file, " Volatile stmt is not const/pure\n");
+ }
+
+
/* Look for loads and stores. */
walk_stmt_load_store_ops (stmt, local, check_load, check_store);

178
devel/avr-gcc/files/patch-502-gcc-4.5.1-bug-18145-v4
View file

@ -1,178 +0,0 @@
diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c 2011-06-09 15:41:06.000000000 -0500
+++ gcc/config/avr/avr.c 2011-06-09 15:46:03.000000000 -0500
@@ -81,6 +81,12 @@ static rtx avr_function_value (const_tre
static void avr_insert_attributes (tree, tree *);
static void avr_asm_init_sections (void);
static unsigned int avr_section_type_flags (tree, const char *, int);
+static void avr_asm_named_section (const char *name, unsigned int flags, tree decl);
+/* Track if code will use .bss and/or .data */
+static int avr_need_clear_bss_p = 0;
+static int avr_need_copy_data_p = 0;
+static void avr_output_data_section_asm_op (const void*);
+static void avr_output_bss_section_asm_op (const void*);
static void avr_reorg (void);
static void avr_asm_out_ctor (rtx, int);
@@ -6102,6 +6108,54 @@ avr_output_progmem_section_asm_op (const
fprintf (asm_out_file, "\t.p2align 1\n");
}
+/* ASM_OUTPUT_COMMON */
+/* Track need of __do_clear_bss */
+
+void
+avr_asm_output_common (FILE *stream, const char *name,
+ unsigned HOST_WIDE_INT size,
+ unsigned HOST_WIDE_INT rounded ATTRIBUTE_UNUSED)
+{
+ avr_need_clear_bss_p = 1;
+ fputs ("\t.comm ", stream);
+ assemble_name (stream, name);
+ fprintf (stream, ",%lu,1\n", (unsigned long) size);
+}
+
+/* ASM_OUTPUT_LOCAL */
+/* Track need of __do_clear_bss */
+
+void
+avr_asm_output_local (FILE *stream, const char *name,
+ unsigned HOST_WIDE_INT size,
+ unsigned HOST_WIDE_INT rounded ATTRIBUTE_UNUSED)
+{
+ avr_need_clear_bss_p = 1;
+ fputs ("\t.lcomm ", stream);
+ assemble_name (stream, name);
+ fprintf (stream, ",%d\n", (int) size);
+}
+
+/* Unnamed section callback to track need of __do_copy_data */
+
+static void
+avr_output_data_section_asm_op (const void *data)
+{
+ avr_need_copy_data_p = 1;
+ /* Dispatch to default */
+ output_section_asm_op (data);
+}
+
+/* Unnamed section callback to track need of __do_clear_bss */
+
+static void
+avr_output_bss_section_asm_op (const void *data)
+{
+ avr_need_clear_bss_p = 1;
+ /* Dispatch to default */
+ output_section_asm_op (data);
+}
+
/* Implement TARGET_ASM_INIT_SECTIONS. */
static void
@@ -6111,6 +6165,27 @@ avr_asm_init_sections (void)
avr_output_progmem_section_asm_op,
NULL);
readonly_data_section = data_section;
+
+ data_section->unnamed.callback = avr_output_data_section_asm_op;
+ bss_section->unnamed.callback = avr_output_bss_section_asm_op;
+}
+
+/* TARGET_ASM_NAMED_SECTION */
+/* Track need of __do_clear_bss, __do_copy_data for named sections */
+
+static void
+avr_asm_named_section (const char *name, unsigned int flags, tree decl)
+{
+ if (!avr_need_copy_data_p)
+ avr_need_copy_data_p =
+ (0 == strncmp (name, ".data", 5)
+ || 0 == strncmp (name, ".rodata", 7)
+ || 0 == strncmp (name, ".gnu.linkonce.", 14));
+
+ if (!avr_need_clear_bss_p)
+ avr_need_clear_bss_p = (0 == strncmp (name, ".bss", 4));
+
+ default_elf_asm_named_section (name, flags, decl);
}
static unsigned int
@@ -6152,12 +6227,6 @@ avr_file_start (void)
AVR_TINY ? fputs ("__tmp_reg__ = 16\n"
"__zero_reg__ = 17\n", asm_out_file) : fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
-
- /* FIXME: output these only if there is anything in the .data / .bss
- sections - some code size could be saved by not linking in the
- initialization code from libgcc if one or both sections are empty. */
- fputs ("\t.global __do_copy_data\n", asm_out_file);
- fputs ("\t.global __do_clear_bss\n", asm_out_file);
}
/* Outputs to the stdio stream FILE some
@@ -6166,6 +6235,16 @@ avr_file_start (void)
static void
avr_file_end (void)
{
+ /* Output these only if there is anything in the
+ .data* / .rodata* / .gnu.linkonce.* resp. .bss*
+ input section(s) - some code size can be saved by not
+ linking in the initialization code from libgcc if resp.
+ sections are empty. */
+ if (avr_need_copy_data_p)
+ fputs (".global __do_copy_data\n", asm_out_file);
+
+ if (avr_need_clear_bss_p)
+ fputs (".global __do_clear_bss\n", asm_out_file);
}
/* Choose the order in which to allocate hard registers for
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr.h 2011-06-09 15:46:03.000000000 -0500
@@ -562,7 +562,7 @@ do { \
#define ASM_APP_OFF "/* #NOAPP */\n"
/* Switch into a generic section. */
-#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
+#define TARGET_ASM_NAMED_SECTION avr_asm_named_section
#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
@@ -570,21 +570,13 @@ do { \
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
-do { \
- fputs ("\t.comm ", (STREAM)); \
- assemble_name ((STREAM), (NAME)); \
- fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
-} while (0)
+ avr_asm_output_common (STREAM, NAME, SIZE, ROUNDED)
#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
-do { \
- fputs ("\t.lcomm ", (STREAM)); \
- assemble_name ((STREAM), (NAME)); \
- fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
-} while (0)
+ avr_asm_output_local (STREAM, NAME, SIZE, ROUNDED)
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
diff -Naurp gcc/config/avr/avr-protos.h gcc/config/avr/avr-protos.h
--- gcc/config/avr/avr-protos.h 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/avr-protos.h 2011-06-09 15:46:03.000000000 -0500
@@ -35,6 +35,9 @@ extern int avr_simple_epilogue (void);
extern void gas_output_limited_string (FILE *file, const char *str);
extern void gas_output_ascii (FILE *file, const char *str, size_t length);
extern int avr_hard_regno_rename_ok (unsigned int, unsigned int);
+extern void avr_asm_output_common (FILE *stream, const char *name, unsigned HOST_WIDE_INT size, unsigned HOST_WIDE_INT rounded);
+extern void avr_asm_output_local (FILE *stream, const char *name, unsigned HOST_WIDE_INT size, unsigned HOST_WIDE_INT rounded);
+
extern rtx avr_return_addr_rtx (int count, const_rtx tem);
#ifdef TREE_CODE

43
devel/avr-gcc/files/patch-503-gcc-4.5.1-avrtiny10-bug-12510
View file

@ -1,43 +0,0 @@
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-06-09 15:53:13.000000000 -0500
+++ gcc/config/avr/avr.h 2011-06-09 15:55:45.000000000 -0500
@@ -136,7 +136,7 @@ extern GTY(()) section *progmem_section;
#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
-#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20)
+#define AVR_IO_OFFSET ((AVR_XMEGA || AVR_TINY) ? 0 : 0x20)
#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0)
#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0)
#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0)
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
--- gcc/config/avr/predicates.md 2011-06-09 14:30:33.000000000 -0500
+++ gcc/config/avr/predicates.md 2011-06-09 15:55:45.000000000 -0500
@@ -50,21 +50,24 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)")
(match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))))
;; Return true if OP is a valid address for high half of I/O space.
(define_predicate "high_io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")
(match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))))
;; Return true if OP is a valid address of I/O space.
(define_predicate "io_address_operand"
(and (match_code "const_int")
- (if_then_else (match_test "AVR_XMEGA")
+ (if_then_else (ior (match_test "AVR_XMEGA")
+ (match_test "AVR_TINY"))
(match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))")
(match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))))

14
devel/avr-gcc/files/patch-504-gcc-4.5.1-bug12915
View file

@ -1,14 +0,0 @@
diff -rupw gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md 2011-02-23 15:54:14.000000000 -0600
+++ gcc/config/avr/avr.md 2011-02-23 15:55:22.000000000 -0600
@@ -1082,8 +1082,8 @@
(set_attr "cc" "clobber")])
(define_expand "<any_extend:u>mulhisi3"
- [(set (reg:HI 18) (match_operand:SI 1 "register_operand" ""))
- (set (reg:HI 20) (match_operand:SI 2 "register_operand" ""))
+ [(set (reg:HI 18) (match_operand:HI 1 "register_operand" ""))
+ (set (reg:HI 20) (match_operand:HI 2 "register_operand" ""))
(set (reg:SI 22)
(mult:SI (any_extend:SI (reg:HI 18))
(any_extend:SI (reg:HI 20))))

12
devel/avr-gcc/files/patch-505-gcc-4.5.1-bug13932
View file

@ -1,12 +0,0 @@
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-06-09 15:23:57.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-06-09 16:01:44.000000000 -0500
@@ -244,7 +244,7 @@ const struct mcu_type_s avr_mcu_types[]
/* Enhanced, ==256K + 3-Byte PC +
{ MOVW/LPMX, JMP/CALL, MUL, ELPM, ELPMX }. */
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
+ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
/* Enhanced, == 256K. */
/* Xmega, <= 8K FLASH. */

40
devel/avr-gcc/files/patch-506-gcc-4.5.1-bug13789
View file

@ -1,40 +0,0 @@
diff -rup gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
--- gcc/config/avr/avr-devices.c 2011-04-27 12:24:24.000000000 -0500
+++ gcc/config/avr/avr-devices.c 2011-04-27 17:19:33.000000000 -0500
@@ -37,14 +37,14 @@ const struct base_arch_s avr_arch_types[
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" },
{ 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=100", "avrtiny10" },
{ 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" },
{ 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" },
{ 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=103", "avrxmega3" },
{ 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" },
{ 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, "__AVR_ARCH__=105", "avrxmega5" },
{ 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" },
- { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, "__AVR_ARCH__=201", "avrtiny10" }
+ { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=107", "avrxmega7" }
};
/* List of all known AVR MCU types - if updated, it has to be kept
diff -rup gcc/config/avr/avr.h gcc/config/avr/avr.h
--- gcc/config/avr/avr.h 2011-04-27 12:24:06.000000000 -0500
+++ gcc/config/avr/avr.h 2011-04-27 17:49:01.000000000 -0500
@@ -79,14 +79,14 @@ enum avr_arch
ARCH_AVR5,
ARCH_AVR51,
ARCH_AVR6,
+ ARCH_AVRTINY10,
ARCH_AVRXMEGA1,
ARCH_AVRXMEGA2,
ARCH_AVRXMEGA3,
ARCH_AVRXMEGA4,
ARCH_AVRXMEGA5,
ARCH_AVRXMEGA6,
- ARCH_AVRXMEGA7,
- ARCH_AVRTINY10
+ ARCH_AVRXMEGA7
};
struct mcu_type_s {

102
devel/avr-gcc/files/patch-599-gcc-4.5.1-bug46779
View file

@ -1,102 +0,0 @@
--- gcc/config/avr/avr.c.orig 2011-09-30 16:19:47.000000000 +0200
+++ gcc/config/avr/avr.c 2011-09-30 16:23:26.000000000 +0200
@@ -1155,8 +1155,7 @@
true_regnum (XEXP (x, 0)));
debug_rtx (x);
}
- if (!strict && GET_CODE (x) == SUBREG)
- x = SUBREG_REG (x);
+
if (REG_P (x) && (strict ? REG_OK_FOR_BASE_STRICT_P (x)
: REG_OK_FOR_BASE_NOSTRICT_P (x)))
r = POINTER_REGS;
@@ -7135,26 +7134,30 @@
int
avr_hard_regno_mode_ok (int regno, enum machine_mode mode)
{
- /* Disallow QImode in stack pointer regs. */
- if ((regno == REG_SP || regno == (REG_SP + 1)) && mode == QImode)
- return 0;
-
- /* The only thing that can go into registers r28:r29 is a Pmode. */
- if (regno == REG_Y && mode == Pmode)
- return 1;
-
- /* Otherwise disallow all regno/mode combinations that span r28:r29. */
- if (regno <= (REG_Y + 1) && (regno + GET_MODE_SIZE (mode)) >= (REG_Y + 1))
- return 0;
-
- if (mode == QImode)
+ /* NOTE: 8-bit values must not be disallowed for R28 or R29.
+ Disallowing QI et al. in these regs might lead to code like
+ (set (subreg:QI (reg:HI 28) n) ...)
+ which will result in wrong code because reload does not
+ handle SUBREGs of hard regsisters like this.
+ This could be fixed in reload. However, it appears
+ that fixing reload is not wanted by reload people. */
+
+ /* Any GENERAL_REGS register can hold 8-bit values. */
+
+ if (GET_MODE_SIZE (mode) == 1)
return 1;
- /* Modes larger than QImode occupy consecutive registers. */
- if (regno + GET_MODE_SIZE (mode) > FIRST_PSEUDO_REGISTER)
+ /* FIXME: Ideally, the following test is not needed.
+ However, it turned out that it can reduce the number
+ of spill fails. AVR and it's poor endowment with
+ address registers is extreme stress test for reload. */
+
+ if (GET_MODE_SIZE (mode) >= 4
+ && regno >= REG_X)
return 0;
- /* All modes larger than QImode should start in an even register. */
+ /* All modes larger than 8 bits should start in an even register. */
+
return !(regno & 1);
}
@@ -7281,13 +7284,23 @@
&& !df_regs_ever_live_p (regno))
return false;
+ /* Don't allow hard registers that might be part of the frame pointer.
+ Some places in the compiler just test for [HARD_]FRAME_POINTER_REGNUM
+ and don't care for a frame pointer that spans more than one register. */
+
+ if ((!reload_completed || frame_pointer_needed)
+ && (regno == REG_Y || regno == REG_Y + 1))
+ {
+ return false;
+ }
+
return true;
}
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
int
-avr_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
+avr_hard_regno_rename_ok (unsigned int old_reg,
unsigned int new_reg)
{
/* Interrupt functions can only use registers that have already been
@@ -7298,6 +7311,17 @@
&& !df_regs_ever_live_p (new_reg))
return 0;
+ /* Don't allow hard registers that might be part of the frame pointer.
+ Some places in the compiler just test for [HARD_]FRAME_POINTER_REGNUM
+ and don't care for a frame pointer that spans more than one register. */
+
+ if ((!reload_completed || frame_pointer_needed)
+ && (old_reg == REG_Y || old_reg == REG_Y + 1
+ || new_reg == REG_Y || new_reg == REG_Y + 1))
+ {
+ return 0;
+ }
+
return 1;
}

17
devel/avr-gcc/files/patch-Makefile.in Normal file
View file

@ -0,0 +1,17 @@
--- Makefile.in.orig 2014-06-13 16:32:16.000000000 +0200
+++ Makefile.in 2014-08-08 20:04:46.000000000 +0200
@@ -36809,6 +36773,14 @@
TARGET-target-libgcc=all
maybe-all-target-libgcc: all-target-libgcc
all-target-libgcc: configure-target-libgcc
+ cp ${HOST_SUBDIR}/gcc/libgcc.mvars gcc/
+ cp ${HOST_SUBDIR}/gcc/tconfig.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/auto-host.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/tm.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/options.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/insn-constants.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/insn-modes.h libgcc/
+ cp ${HOST_SUBDIR}/gcc/gcov-iov.h libgcc/
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \

38
devel/avr-gcc/files/patch-gcc-config-avr-driver-avr.c
View file

@ -1,38 +0,0 @@
--- gcc/config/avr/driver-avr.c.orig 2013-03-14 16:26:36.000000000 +0100
+++ gcc/config/avr/driver-avr.c 2013-03-14 16:28:52.000000000 +0100
@@ -55,7 +55,7 @@
avr_device_to_arch (int argc, const char **argv)
{
if (0 == argc)
- return;
+ return NULL;
avr_set_current_device (argv[0]);
@@ -71,7 +71,7 @@
char data_section_start_str[16];
if (0 == argc)
- return;
+ return NULL;
avr_set_current_device (argv[0]);
@@ -93,7 +93,7 @@
avr_device_to_startfiles (int argc, const char **argv)
{
if (0 == argc)
- return;
+ return NULL;
avr_set_current_device (argv[0]);
@@ -106,7 +106,7 @@
avr_device_to_devicelib (int argc, const char **argv)
{
if (0 == argc)
- return;
+ return NULL;
avr_set_current_device (argv[0]);

18
devel/avr-gcc/files/patch-plugins
View file

@ -1,18 +0,0 @@
--- gcc/configure.orig
+++ gcc/configure
@@ -25460,13 +25460,13 @@
$as_echo_n "checking for exported symbols... " >&6; }
echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c
${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1
- if $gcc_cv_objdump -T conftest | grep foobar > /dev/null; then
+ if $ac_cv_prog_OBJDUMP -T conftest | grep foobar > /dev/null; then
: # No need to use a flag
else
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5
$as_echo_n "checking for -rdynamic... " >&6; }
${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1
- if $gcc_cv_objdump -T conftest | grep foobar > /dev/null; then
+ if $ac_cv_prog_OBJDUMP -T conftest | grep foobar > /dev/null; then
plugin_rdynamic=yes
pluginlibs="-rdynamic"
else

15
devel/avr-gcc/pkg-descr
View file

@ -1,23 +1,14 @@
FSF gcc-4.x for Atmel AVR cross-development
Included is the basic C++ compiler, although this is only of limited
use without a libstdc++, and it is little tested.
use without a libstdc++.
Supported debugging formats: -gdwarf-2 [default], -gstabs
Local patch added: OS_main attribute
Locally added support for the following AVR devices:
ATmega32C1, ATmega64C1, ATmega32M1, ATmega64M1
ATmega16U4, ATmega32U4, ATmega32U6
ATmega128RFA1
M3000F, M3000S, M3001B
AT90SCR100
ATtiny13A
ATtiny87, ATtiny167, ATtiny327
AT90PWM81
ATxmega64A1, ATxmega128A1, ATxmega64A3, ATxmega128A3, ATxmega256A3,
ATxmega256A3B
ATmega64RFR2, ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2,
ATmega256RFR2, ATmega2564RFR2
WWW: http://gcc.gnu.org/
WWW: http://www.nongnu.org/avr-libc/