Stage support

This commit is contained in:
Antoine Brodin 2013-12-30 18:36:10 +00:00
parent cc7a829b38
commit 5e1c9c042d
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=338158
2 changed files with 3 additions and 6 deletions

View file

@ -8,18 +8,14 @@ CATEGORIES= cad
MASTER_SITES= SF/mot-${PORTNAME}/${PORTNAME}-source/${PORTVERSION:R}
MAINTAINER= ports@FreeBSD.org
COMMENT= A model generator for SPICE simulators
COMMENT= Model generator for SPICE simulators
LICENSE= LGPL21
LICENSE_FILE= ${WRKSRC}/COPYING
USES= pkgconfig
USES= gmake pkgconfig
USE_GNOME= glib20
USE_GMAKE= yes
GNU_CONFIGURE= yes
USE_LDCONFIG= yes
MAN1= admsXml.1
NO_STAGE= yes
.include <bsd.port.mk>

View file

@ -15,3 +15,4 @@ lib/libadmsVeriloga.a
lib/libadmsVeriloga.la
lib/libadmsVeriloga.so
lib/libadmsVeriloga.so.0
man/man1/admsXml.1.gz