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Convert to test framework

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Approved by:	portmgr (blanket)
This commit is contained in:
Sunpoet Po-Chuan Hsieh 2017-10-12 08:09:44 +00:00
parent 3b482ca6aa
commit 02ff99a147
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=451814
1 changed files with 0 additions and 3 deletions
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3
cad/p5-Verilog-Perl/Makefile
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@ -24,7 +24,4 @@ post-install:
${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Parser/*.so ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Parser/*.so
${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Preproc/*.so ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Preproc/*.so
regression-test: build
make test -C ${WRKSRC}
.include <bsd.port.mk> .include <bsd.port.mk>